PEB 20954 HT V1.1 Infineon Technologies, PEB 20954 HT V1.1 Datasheet - Page 13

• Manufacturer Part Number: PEB 20954 HT V1.1
• Description: IC SIDEC T/E 32CHAN TQFP-144-8
• Manufacturer: Infineon Technologies

Specifications of PEB 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 4
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection, Maskable Disabling, Voiceband Echo Cancelling
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEB20954HTV1.1T; PEB20954HTV11XP; SP000007504; SP000007506

• Integrated Universal Control and Communication Interface (UCCI) for signaling
• Support of Channel Associated Signaling (CAS) BR transparency (robbed bits) in
• Selectable - to A-Law or A- to -Law Conversion on a global or per channel basis
• Configurable idle channel supervision
• Clear channel capability (64 clear) on a per channel basis
• Special evaluation of bit 8 in T1 Modem calls possible (56 clear)
• Serial 256 kbit/s interface to control the functions disable cancelling, freeze
• Monitor pins for several internal states
• Switchable global loop from receive output to send input and send output to receive
• Switchable global attenuation (2.5 dB or 6 dB) at the receive and send output
• Flexible Microprocessor Interface (Intel or Motorola type, Mux and Demux mode)
• Advanced Integrated Watchdog Timer
• Supervision of the input clocks
• Various clock modes possible for 32.768 MHz and 8.192 MHz
• Boundary Scan according to IEEE 1149.1 Standard
• Power supply: 3.3 V, 5V tolerant inputs
• Typical power dissipation: 900 mW
• Plastic package P-TQFP 144-8, P-LFBGA 160-2
• Temperature range: -40 C - 85 C and 0°C - 70°C
Data Sheet
highways with direct hardware control for:
– disable cancelling
– configurable disabling functions
– communication between board controllers
send path
coefficients, clear channel, disable NLP, PCM Law conversion control or
combinations of above
input
usable for:
– configuration of parameters such as thresholds and functions on a global basis
– Disable cancelling, freeze coefficients, clear channel, disable NLP, PCM Law
– support of background tests for disabled or idle timeslots (feeding and reading of
– possibility to read levels, attenuations, internal states, signal values or all
– control of the RAM Built In Self Test
conversion control (all functions individually for each channel)
test levels)
coefficients of a selected timeslot
13
Rev. 2, 2004-07-28
Introduction
PEB 20954
PEF 20954