SC16IS741IPW,128 NXP Semiconductors, SC16IS741IPW,128 Datasheet - Page 34

• Manufacturer Part Number: SC16IS741IPW,128
• Description: IC UART 16TSSOP
• Manufacturer: NXP Semiconductors
• Type: IrDA or RS-232 or RS-485r

Specifications of SC16IS741IPW,128

• Number Of Channels: 1, UART
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Features: RS-485
• Fifo's: 64 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.5V, 3.3V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 5 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935290736128

NXP Semiconductors
SC16IS741_1
Product data sheet
Fig 17. I
master write:
master read:
combined
formats:
2
C-bus data formats
S
START condition
S
START condition
S
START condition
SLAVE ADDRESS
SLAVE ADDRESS
SLAVE ADDRESS
Another way for a master to communicate with several different devices would be by using
a ‘repeated START’. After the last byte of the transaction was transferred, including its
acknowledge (or negative acknowledge), the master issues another START, followed by
address byte and data—without effecting a STOP. The master may communicate with a
number of different devices, combining ‘reads’ and ‘writes’. After the last transfer takes
place, the master issues a STOP and releases the bus. Possible data formats are
demonstrated in
slave and a change of direction, without releasing the bus. We shall see later on that the
change of direction feature can come in handy even when dealing with a single device.
In a single master system, the repeated START mechanism may be more efficient than
terminating each transfer with a STOP and starting again. In a multimaster environment,
the determination of which format is more efficient could be more complicated, as when a
master is using repeated STARTs it occupies the bus for a long time and thus preventing
other devices from initiating transfers.
read or
write
write
read
R/W
W
R
acknowledge
acknowledge
acknowledge
A
A
A
Figure
(n bytes + acknowledge)
Single UART with I
data transferred
DATA
DATA
DATA
Rev. 01 — 29 April 2010
17. Note that the repeated START allows for both change of a
acknowledge
(n bytes + acknowledge)
(n bytes + acknowledge)
data transferred
data transferred
A
acknowledge
A
acknowledge
A
Sr
repeated
START condition
2
SLAVE ADDRESS
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
DATA
DATA
may change at this point
acknowledge
acknowledge
STOP condition
STOP condition
direction of transfer
not
NA
read or
A
write
R/W
P
P
acknowledge
A
(n bytes + acknowledge)
SC16IS741
data transferred
DATA
© NXP B.V. 2010. All rights reserved.
acknowledge
STOP condition
002aab458
A
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