SC28L198A1A,518 NXP Semiconductors, SC28L198A1A,518 Datasheet - Page 43

• Manufacturer Part Number: SC28L198A1A,518
• Description: IC UART OCTAL SOT189-3
• Manufacturer: NXP Semiconductors
• Type: Octal UART for 3.3 V and 5 V supply voltager

Specifications of SC28L198A1A,518

• Number Of Channels: 8
• Package / Case: 84-LCC (J-Lead)
• Features: False-start Bit Detection
• Fifo's: 16 Byte
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 0.4608 MBd
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current: 150 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V or 5 V
• Transmit Fifo: 16Byte
• Receive Fifo: 16Byte
• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: PLCC
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935261323518; SC28L198A1A-T; SC28L198A1A-T

Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS FOR COMMERCIAL AND INDUSTRIAL (5V)
V
2006 Aug 10
Reset Timing
t
Bus Timing
t
t
t
t
t
t
t
t
t
t
t
I/O Port Pin Timing
t
t
t
Interrupt Timing
t
t
Tx/Rx Clock Timing
t
F
t
F
Transmitter Timing
t
ttcs
Receiver Timing
t
t
ts
CC
RES
AS
AH
t
CH
STP
RWS
RWH
DD
DF
DS
DH
RWD
PS
PH
PD
IR
DD
RX
TX
TXD
RXS
RXH
CS
RX
TX
Octal UART for 3.3 V and 5 V supply voltage
STRT
SYMBOL
= 5.0 volts
4
4
1
FIG #
10%; T
A
RESET pulse width
A0–A7 setup time before Sclk C3 rising edge
A0–A7 hold time after Sclk C3 rising edge
CEN setup time before Sclk C1 high (Sync)
CEN setup time before Sclk C2 high (Async)
CEN hold time after Sclk C3 high (Sync)
CEN hold time after Sclk C4 high (Async)
CEN high before next C2 to stop next cycle (Sync Mode)
W–Rn setup time before Sclk C2 rising edge
W–Rn hold time after Sclk C3 rising edge
Read cycle Data valid after Sclk C3 rising edge
Read cycle data bus floating after CEN high (Sync)
Read cycle data bus floating after C4 end high (Async)
Write cycle data setup time before Sclk C4 rising edge
Write cycle data hold time after Sclk C4 rising edge
High time between CEN low (Async)
I/O input setup time before Sclk C3 rising edge
I/O input hold time after Sclk C4 rising edge
I/O output valid from:
IRQN from:
IACKN cycle Data valid after Sclk C3 rising edge
RxC high or low time
RxC frequency (16 X)
TxC high or low time
TxC frequency (16 X)
TxD output delay from TxC low
TxC output delay from TxD output data
RxD data setup time to RxC high (data)
RxD data hold time from RxC high (data)
RxD data low time for receiving a valid Start Bit
= –40 C to +85 C; unless otherwise specified
Write Sclk C4 rising edge (write to IOPIOR)
Internal interrupt source active bid
Reset to IRQN inactive
Write IMR (set or clear IMR bit)
(1 X)
(1 X)
PARAMETER
3
43
2
17/32
MIN
–15
10
10
18
14
25
18
14
25
15
12
18
12
22
15
15
20
20
5
5
5
0
0
0
0
LIMIT
1 Sclk
1 Sclk
1 Sclk
TYP
32
–4
12
10
10
14
32
26
12
4
6
Sclk
2
8
3
3
8
4
1
8
7
SC28L198
Product data sheet
MAX
60
15
25
16
15
50
43
75
45
25
16
16
1
1
Sclk
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Sclk
ns
ns
ns
ns
Mhz
Mhz
ns
Mhz
Mhz
UNIT
ns
ns
ns
ns
bit
time