ATA5830N-PNQW Atmel, ATA5830N-PNQW Datasheet - Page 12
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ATA5830N-PNQW
Manufacturer Part Number
ATA5830N-PNQW
Description
Manufacturer
Atmel
Datasheet
1.ATA5830N-PNQW.pdf
(27 pages)
Specifications of ATA5830N-PNQW
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1.6
12
System Overview
Atmel ATA5830/ATA5830N
Figure 1-3.
Figure 1-3
of the Atmel ATA5830 is performed through the SPI pins SCK, MOSI, MISO and NSS found
on port B. The configuration of the Atmel ATA5830 is stored in the EEPROM and a large part
of the functionality is defined with the firmware located in the ROM and processed using the
AVR
configures all hardware registers of the different blocks according to this information, starts
then the RXMode and directs the received data to the Rx Buffer located in the SRAM. An
EVENT on port PB6 is signaled to the external microcontroller when the expected number of
bytes are received.
Part of the EEPROM content is copied to the SRAM during start-up of the Atmel ATA5830 for
faster access. Care should be taken to limit EEPROM R/W cycles so that the device's maxi-
mum rating is not exceeded. Alternatively, the user should consider modifying the parameters
in the SRAM.
RFOUT
®
RFIN
. e.g. a SPI command like “Start RXMode” uses the information located in the EEPROM
shows an overview of the main functional blocks of the Atmel ATA5830. The control
Circuit Overview
Frontend
XTO
RF
XTAL
Rx DSP
Tx DSP
SRC, FRC
Oscillators
PB (0 to 7)
Port B (8)
(SPI)
AVR CPU
AVCC
PC (0 to 5)
Port C (6)
DATA BUS
Supply
Reset
VS
DVCC
9208DS–RKE–07/11