ATA5830N-PNQW Atmel, ATA5830N-PNQW Datasheet - Page 19

• Manufacturer Part Number: ATA5830N-PNQW
• Manufacturer: Atmel

Specifications of ATA5830N-PNQW

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.2.2
9208DS–RKE–07/11
RX Digital Signal Processing (Rx DSP)
The Rx DSP block performs the digital signal processing, decoding and checking of the Rx
samples from the ADC. It delivers the raw data at the TRPA/B pins, the decoded data at the
TMDO output and the buffered data bytes (Rx byte A/B) from the Rx buffer. It also provides
auxiliary information about the signal like the received signal strength indication (RSSI) and
the frequency offset of the received signal versus the selected center frequency (RXFOA/B).
Figure 3-2.
The channel filter determines the receiver bandwidth. Its output is used for both receiving
paths A and B. Therefore it has to be configured to be suitable for both. The receiving paths A
and B are identical and consist of an ASK/FSK demodulator with attached signal checks, a
frame synchronizer supporting pattern based search for the telegram start and a 1 byte hard-
ware buffer for received data.
The receiver architecture with parallel receiving paths A and B allows for a simultaneous
search for two different transmitters. The simultaneous search is supported only when the flex-
ible telegram support is enabled (see EEPROM description).
E.g. Path A can be configured for an ASK telegram with high data rate and path B can be con-
figured for an FSK telegram with low data rate. During PollingMode both settings are applied
and the check occurs simultaneously. This results in a shorter active time during polling.
ADC
Data
Rx DSP Overview
Channel
Filter
RXFOA
RXFOB
Demod &
Demod &
Check A
Check B
RSSI
TRPA
TRPB
Atmel ATA5830/ATA5830N
Sync A
Sync B
Frame
Frame
=
=
TMDO_A
TMDO_B
TMDO_CLK_A
TMDO_CLK_B
Buffer A
Buffer A
Rx
Rx
Rx Byte A
Rx Byte A
Rx Byte B
Rx Byte B
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