ATA5830N-PNQW Atmel, ATA5830N-PNQW Datasheet - Page 17

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ATA5830N-PNQW

Manufacturer Part Number
ATA5830N-PNQW
Description
Manufacturer
Atmel
Datasheet

Specifications of ATA5830N-PNQW

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Atmel ATA5830/ATA5830N
In TXMode the fractional-N PLL generates the TX frequency. The power amplifier generates a
programmable RF output power of –10dBm to 14dBm on RFOUT. The FSK modulation is per-
formed by changing the frequency setting of the fractional-N PLL dynamically with the TX
digital signal processing (TxDSP). Digital preemphasis and digital gauss filtering can be acti-
vated in the TxDSP for higher data rates or low occupied bandwidth. The ASK modulation is
performed by switching the power amplifier on and off.
With the single pole double throw (SPDT) switch the RF signal from the antenna is switched to
RFIN in RXMode and from RFOUT to the antenna in TXMode. An adjustable capacitor and an
RF leveldetector on ANT_TUNE is used to tune the center frequency of loop antennas to
reduce tolerances and capacitive proximity effects.
®
The system is controlled by an AVR
CPU with 24KB ROM, 6KB Flash, 512byte EEPROM,
768 byte SRAM and other peripherals supporting the transceiver handling. Two ports PB[0..7]
and PC[0..5] are available for external digital connections, e.g. the SPI interface is connected
®
to port B. The Atmel
ATA5830 is controlled by EEPROM configuration and SPI commands.
The functional behavior is mainly determined by the firmware in the ROM. It can be configured
to a high degree by modifying the EEPROM settings. The firmware running on the AVR gives
access to the hardware functionality of the Atmel ATA5830. Extensions to this firmware can be
added in the 6 KB of Flash memory. The RXDSP and TXDSP registers are directly accessible
from the AVR since these DSP’s are directly connected to the AVR data Bus. The RF frontend
registers are programmed with an on chip serial interface(SSI) accessing the RF frontend
control.
The power management contains low-dropout (LDO) regulators and reset circuits for the sup-
ply voltages VS, AVCC, DVCC and VS_PA of the Atmel ATA5830. In OFFMode all the supply
voltages AVCC, DVCC and VS_PA (VS_PA only for 4.5V to 5.5V operation) are switched off
to achieve a very low current consumption. The Atmel ATA5830 can be powered up by acti-
vating the PWRON pin or one of the NPWRON1..6 pins since they are still active in OFFMode.
The RF frontend circuits and the XTO are connected to AVCC, the AVCC domain can be
switched on and off independently from DVCC.
Atmel ATA5830 provides two idle modes. In IDLEMode(RC) only the DVCC voltage regulator,
the FRC and SRC oscillators are active and the AVR uses a power down mode to achieve a
low current consumption. The same power down mode can be used during the inactive
phases of the PollingMode. In IDLEMode(XTO) the AVCC voltage domain as well as the XTO
are activated additionally.
An integrated watchdog timer is available to restart the Atmel ATA5830.
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9208DS–RKE–07/11

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