TDA8933BTW/N2,118 NXP Semiconductors, TDA8933BTW/N2,118 Datasheet - Page 22

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TDA8933BTW/N2,118

Manufacturer Part Number
TDA8933BTW/N2,118
Description
IC AMP AUDIO CLASS D 32HTSSOP
Manufacturer
NXP Semiconductors
Type
Class Dr
Datasheets

Specifications of TDA8933BTW/N2,118

Output Type
1-Channel (Mono) or 2-Channel (Stereo)
Max Output Power X Channels @ Load
20.6W x 1 @ 16 Ohm; 10.3W x 2 @ 8 Ohm
Voltage - Supply
10 V ~ 36 V, ±5 V ~ 18 V
Features
Depop, Differential Inputs, Mute, Short-Circuit and Thermal Protection
Mounting Type
Surface Mount
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285222118
NXP Semiconductors
Table 5:
T
to a capacitor, unless otherwise specified. All voltages are measured with respect to signal ground (pin 7); currents are
positive when flowing into the IC.
UBA2074(A)
Preliminary data sheet
Symbol
V
V
V
I
I
R
V
V
D
D
D
I
I
V
V
Protections
V
I
V
I
V
V
V
T
T
T
V
V
I
I
I
CSWP(charge)
CSWP(discharge)
PWMD(source)
PWMD(sink)
CVFB(ov)
CVFB(hs)
nonFAULT(trigger)
nonFAULT(3V)
nonFAULT(short)
amb
SPIKE(min)
fault(delay)
fault(stop)
CSWP(high)
CIFB(hclamp)
CSWP(lclamp)
PWMa(min)
PWMa(max)
PWMD(high)
PWMD(low)
VFB(ovref)
HS(thresshold)
IFB(lampon)
IFB(ocref)
IFB(arcref)
nonFAULT(open)
nonFAULT(trigger)
PWMa
PWM(min,intern)
PWM(min,extern)
PWM(max)
= 25 °C; V
Characteristics
VDC
= 15 V; VDD not connected to VDC; V
Parameter
CSWP voltage resulting in
∆φ
high CIFB clamp voltage
low CSWP clamp voltage
CSWP charge current
CSWP discharge current
input impedance PWMa pin
input voltage on PWMa pin for
minimum PWM duty cycle
input voltage on PWMa pin for
maximum PWM duty cycle
minimum PWM duty cycle
minimum PWM duty cycle
maximum PWM duty cycle
source capability PWMd output V
sink capability PWMd output
logic high input level on PWMd
logic low input level onPWMd
over voltage reference level
CVFB discharge current
hard-switching detection level
CVFB discharge current
lamp on detection level
over current reference level
minimum detectable arcing
spike amplitude
minimum detectable arcing
spike duration
fault output delay time
fault stop time
open pin voltage on nonFAULT
input trigger voltage on pin
nonFAULT
input trigger current of
nonFAULT pin
low input nonFAULT pin current V
short circuit current on pin
nonFAULT
(max)
…continued
Rev. 02.0 — February 2007
Conditions
CPWM pin connected to SGND
V
V
UBA2074 only
hard switching detected,
V
C
C
V
PWMd
PWMd
VFB
CVFB
nonFAULT
nonFAULT
CT
CT
High Voltage Full-bridge control IC for CCFL backlighting
= 100 nF
= 100 nF
>V
EN
=2V
=3V
=1V
=V
VFB(ovref)
= 3V
= 0V
VDD
; C
, V
VDD
CVFB
=100nF; R
=2V
IREF
= 33 kΩ and CPWM pin connected
[3]
[3]
[3]
Min
-24
18
0.85
2.40
18
30
36
2.65
0.063 0.069 0.075 s
0.85
4.7
3.8
-32
-220
-240
UBA2074(A)
Typ
3
3.1
0.95
-21
21
100
1.24
3
12
0
100
-1
1
2.52
21
41
0.9
3.0
5
200
0.95
5.0
4.3
-27
-190
-210
© NXP B.V. 2007. All rights reserved.
Max
-18
24
1.7
2.64
24
46
3.3
1.05
5.3
4.8
-22
-160
-180
Unit
V
V
V
µA
µA
kΩ
V
V
%
%
%
mA
mA
V
V
V
µA
V
µA
V
V
V
ns
s
V
V
µA
µA
µA
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