MX29LV004BQC-70 Macronix International Co., MX29LV004BQC-70 Datasheet
MX29LV004BQC-70
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MX29LV004BQC-70 Summary of contents
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FEATURES • Extended single - supply voltage range 2.7V to 3.6V • 524,288 x 8 • Single power supply operation - 3.0V only operation for read, erase and program operation • Fast access time: 55R/70/90ns • Low power consumption - ...
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PIN CONFIGURATIONS 40 TSOP (Standard Type) (10mm x 20mm) A16 1 A15 2 A14 3 A13 4 A12 5 A11 RESET RY/BY 12 A18 ...
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BLOCK STRUCTURE Table 1: MX29LV004T SECTOR ARCHITECTURE Sector Sector Size Byte Mode SA0 64Kbytes SA1 64Kbytes SA2 64Kbytes SA3 64Kbytes SA4 64Kbytes SA5 64Kbytes SA6 64Kbytes SA7 32Kbytes SA8 8Kbytes SA9 8Kbytes SA10 16Kbytes Table 2: MX29LV004B SECTOR ARCHITECTURE Sector ...
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BLOCK DIAGRAM CONTROL CE OE INPUT WE LOGIC RESET (for 40-TSOP) ADDRESS LATCH A0-A18 AND BUFFER Q0-Q7 P/N:PM0732 MX29LV004T/B PROGRAM/ERASE HIGH VOLTAGE MX29LV004T/B FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER ...
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AUTOMATIC PROGRAMMING The MX29LV004T/B is byte programmable using the Au- tomatic Programming algorithm. The Automatic Pro- gramming algorithm makes the external system do not need to have time out sequence nor to verify the data programmed. The typical chip programming ...
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VID, as shown in table4. To verify whether or not sector being protected, the sec- tor address must appear on the appropriate highest or- der address bit (see Table 1 and Table 2). ...
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TABLE 4. MX29LV004T/B COMMAND DEFINITIONS First Bus Command Bus Cycle Cycle Addr Reset 1 XXXH F0H Read 1 RA Read Silicon ID 4 555H AAH 2AAH Sector Protect 4 555H AAH 2AAH Verify Porgram 4 555H AAH 2AAH Chip Erase ...
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COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table ...
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REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE and OE pins to VIL the power control and selects the device the output control and gates array ...
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Flash memory. If RESET is asserted during a program or erase operation, the RY/BY pin remains a "0" (busy) until the internal reset operation is complete, which requires a time ...
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TABLE 6. EXPANDED SILICON ID CODE Pins A0 A1 Manufacture code VIL VIL Device code VIH VIL for MX29LV004T VIH VIL Device code VIH VIL for MX29LV004B VIH VIL Sector Protection X VIH Verification X VIH READING ARRAY DATA The ...
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SECTOR ERASE COMMANDS The Automatic Sector Erase does not require the de- vice to be entirely pre-programmed prior to executing the Automatic Sector Erase Set-up command and Au- tomatic Sector Erase command. Upon executing the Automatic Sector Erase command, the ...
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ERASE SUSPEND This command only has meaning while the state ma- chine is executing Automatic Sector Erase operation, and therefore will only be responded during Automatic Sector Erase operation. When the Erase Suspend com- mand is written during a sector ...
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BY. Table 10 and the following subsections describe the functions of these bits. Q7, RY/BY, and DQ6 each offer a method for determining whether a program or erase operation is complete or in progress. These three bits are discussed first. ...
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If a program address falls within a protected sector, Q6 toggles for approximately 2 us after the program com- mand sequence is written, then returns to reading array data. Q6 also toggles during the erase-suspend-program mode, and stops toggling once ...
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Q3 Sector Erase Timer After the completion of the initial sector erase command sequence, the sector erase time-out will begin. Q3 will remain low until the time-out is complete. Data Polling and Toggle Bit are valid after the initial sector ...
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CHIP UNPROTECT The MX29LV004T/B also features the chip unprotect mode, so that all sectors are unprotected after chip unprotect is completed to incorporate any changes in the code recommended to protect all sectors before activating chip unprotect mode. ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied .... ...
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Table 8. CAPACITANCE SYMBOL PARAMETER CIN1 Input Capacitance CIN2 Control Pin Capacitance COUT Output Capacitance READ OPERATION Table 9. DC CHARACTERISTICS TA = -40 Symbol PARAMETER ILI Input Leakage Current ILIT A9 Input Leakage Current ILO Output ...
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AC CHARACTERISTICS TA = -40 ( Table 10. READ OPERATIONS SYMBOL PARAMETER tRC Read Cycle Time (Note 1) tACC Address to Output Delay tCE CE to Output Delay tOE OE to Output Delay tDF OE High to Output ...
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Figure 1. SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL=100pF Including jig capacitance CL=30pF for MX29LV004T/B-70 & MX29LV004T/B-55R Figure 2. SWITCHING TEST WAVEFORMS 3.0V 1. TESTING: Inputs are driven at 3.0V for a logic "1" and 0V for a ...
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Figure 3. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE VIL VIH OE VIL HIGH Z VOH Outputs VOL VIH RESET VIL P/N:PM0732 MX29LV004T/B tRC ADD Valid tACC tCE tOE tOEH tACC tOH DATA Valid 22 tDF ...
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AC CHARACTERISTICS TA = -40 ( Table 11. Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES Output Enable Setup ...
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AC CHARACTERISTICS TA = -40 ( Table 12. Alternate CE Controlled Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES ...
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Figure 4. COMMAND WRITE TIMING WAVEFORM VCC 3V VIH Addresses VIL tAS VIH WE VIL tOES CE VIH VIL tCS OE VIH VIL VIH Data VIL P/N:PM0732 MX29LV004T/B ADD Valid tAH tWP tCWC tCH tDS tDH DIN 25 tWPH REV. ...
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AUTOMATIC PROGRAMMING TIMING WAVEFORM One byte data is programmed. Verify in fast algorithm and additional verification by external control are not re- quired because these operations are executed automati- cally by internal control circuit. Programming comple- tion can be verified ...
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Figure 6. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM0732 MX29LV004T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES No ...
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Figure 7. CE CONTROLLED PROGRAM TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE tGHEL OE CE tWS Data tRH RESET RY/BY NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, DQ7=complement of data written to device. 2.Figure indicates ...
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AUTOMATIC CHIP ERASE TIMING WAVEFORM All data in chip are erased. External erase verification is not required because data is verified automatically by internal control circuit. Erasure completion can be veri- fied by DATA polling and toggle bit checking after ...
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Figure 9. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM0732 MX29LV004T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H ...
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AUTOMATIC SECTOR ERASE TIMING WAVEFORM Sector indicated by A12 to A17 are erased. External erase verify is not required because data are verified automatically by internal control circuit. Erasure comple- tion can be verified by DATA polling and toggle bit ...
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Figure 11. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM0732 MX29LV004T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address ...
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Figure 12. ERASE SUSPEND/ERASE RESUME FLOWCHART P/N:PM0732 MX29LV004T/B START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another ...
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Figure 13. IN-SYSTEM SECTOR PROTECT/UNPROTECT TIMING WAVEFORM (RESET Control) VID VIH RESET SA, A6 A1, A0 Sector Protect or Sector Unprotect Data 60h 1us Note: When sector protect, A6=0, A1=1, A0=0. When sector unprotect, A6=1, A1=1, A0=0. ...
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Figure 14. IN-SYSTEM SECTOR PROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=25? Yes Device failed P/N:PM0732 MX29LV004T/B START PLSCNT=1 RESET=VID Wait 1us No Temporary Sector First Write Unprotect Mode Cycle=60H Yes Set up sector address Write 60H to sector address ...
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Figure 15. SECTOR PROTECT TIMING WAVEFORM(A9, OE Control 12V 3V A9 tVLHT 12V 3V OE tVLHT WE CE Data A18-A12 P/N:PM0732 MX29LV004T/B tWPP 1 tOESP Sector Address 36 Verify tVLHT 01H F0H tOE REV. 1.1, SEP. 19, 2001 ...
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Figure 16. SECTOR PROTECTION ALGORITHM (A9, OE Control) No PLSCNT=32? Yes Device Failed P/N:PM0732 MX29LV004T/B START Set Up Sector Addr PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 150us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector Addr=SA, ...
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Figure 17. IN-SYSTEM SECTOR UNPROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=1000? Yes Device failed P/N:PM0732 MX29LV004T/B START PLSCNT=1 RESET=VID Wait 1us No Temporary Sector First Write Unprotect Mode Cycle=60H ? Yes No All sector Protect all sectors protected? Yes ...
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Figure 18. TIMING WAVEFORM FOR CHIP UNPROTECTION (A9, OE Control) A1 12V 3V A9 tVLHT A6 12V 3V OE tVLHT WE CE Data A18-A12 Notes: tWPP1 (Write pulse width for sector protect)=100ns min, 10us(typ.). tWPP2 (Write pulse width for sector ...
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Figure 19. CHIP UNPROTECTION ALGORITHM (A9, OE Control) Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM0732 MX29LV004T/B START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE Pulse Time ...
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WRITE OPERATION STATUS Figure 20. DATA POLLING ALGORITHM NOTE : 1.VA=Valid address for programming 2.Q7 should be re-checked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM0732 MX29LV004T/B Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ? No No ...
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Figure 21. TOGGLE BIT ALOGRITHM NO Program/Erase Operation Not Complete,Write Note:1.Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 change to "1". P/N:PM0732 Start Read Q7-Q0 ...
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Figure 22. DATA POLLING TIMINGS (DURING AUTOMATIC ALOGRITHMS) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE DQ7 Q0-Q6 tBUSY RY/BY NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and ...
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Figure 23. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALOGRITHMS) tRC VA Address tACC tCE CE tCH tOE OE tOEH WE High Z Q6/Q2 tBUSY RY/BY NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command ...
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Table 13. AC CHARACTERISTICS (for 40-pin TSOP package type) Parameter Std Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP ...
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Table 14. TEMPORARY SECTOR UNPROTECT Parameter Std. Description tVIDR VID Rise and Fall Time (See Note) tRSP RESET Setup Time for Temporary Sector Unprotect Note: Not 100% tested Figure 25. TEMPORARY SECTOR UNPROTECT TIMING DIAGRAM 12V RESET 0 or Vcc ...
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Figure 27. TEMPORARY SECTOR UNPROTECT ALGORITHM Temporary Sector Unprotect Completed(Note 2) Note : P/N:PM0732 MX29LV004T/B Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH 1. All protected sectors are temporary unprotected. VID=11.5V~12.5V 2. ...
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Figure 28. ID CODE READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC VIH A1 VIL ADD VIH A2-A8 A10-A18 VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH DATA VIL Q0-Q7 ...
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Table 15. ERASE AND PROGRAMMING PERFORMANCE(1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycles Note: 1.Not 100% Tested, Excludes external system level over head. 2.Typical values measured at 25°C, 3V. 3.Maximum values measured ...
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... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME (ns) MX29LV004TTC-55R 55 MX29LV004BTC-55R 55 MX29LV004TTC-70 70 MX29LV004BTC-70 70 MX29LV004TTC-90 90 MX29LV004BTC-90 90 MX29LV004TTI-70 70 MX29LV004BTI-70 70 MX29LV004TTI-90 90 MX29LV004BTI-90 90 MX29LV004TQC-55R 55 MX29LV004BQC-55R 55 MX29LV004TQC-70 70 MX29LV004BQC-70 70 MX29LV004TQC-90 70 MX29LV004BQC-90 70 MX29LV004TQI-70 70 MX29LV004BQI-70 70 MX29LV004TQI-90 70 MX29LV004BQI-90 70 P/N:PM0732 MX29LV004T/B OPERATING CURRENT STANDBY CURRENT MAX.(mA) MAX.(uA PACKAGE 40 Pin TSOP 40 Pin TSOP 40 Pin TSOP ...
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PACKAGE INFORMATION 40-PIN PLASTIC TSOP P/N:PM0732 MX29LV004T/B 51 REV. 1.1, SEP. 19, 2001 ...
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PLCC P/N:PM0732 MX29LV004T/B 52 REV. 1.1, SEP. 19, 2001 ...
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REVISION HISTORY Revision No. Description 1.0 Removed "Advance Information" heading Added 32-PLCC package type Correct mis-typing tBUSY was changed from 90us to 90ns 1.1 Correct mis-typing Erase suspend spec was changed from 100us max. to 20us max.P13 The conditions of ...
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