AT32UC3B064 Atmel Corporation, AT32UC3B064 Datasheet - Page 365
AT32UC3B064
Manufacturer Part Number
AT32UC3B064
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B064
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
44
Ext Interrupts
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
4
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3B0128 PDF datasheet #4
- AT32UC3B0128 PDF datasheet #5
- Current page: 365 of 684
- Download datasheet (11Mb)
22.7.1.7
32059L–AVR32–01/2012
Pad Suspend
Figure 22-9 on page 365
Figure 22-9. Pad Behavior
Figure 22-10 on page 366
• There is no way the data of the pipe/endpoint 0 can be lost (except if it is de-allocated) as
• Deactivating then reactivating a same pipe/endpoint with the same configuration only
• When the user write a one to the ALLOC bit, the Configuration OK Status bit in the Endpoint
• In the Idle state, the pad is put in low power consumption mode, i.e., the differential receiver
• In the Active state, the pad is working.
memory allocation and de-allocation may affect only higher pipes/endpoints.
modifies temporarily the controller DPRAM pointer and size for this pipe/endpoint, but
nothing changes in the DPRAM, so higher endpoints seem to not have been moved and their
data is preserved as far as nothing has been written or received into them while changing the
allocation state of the first pipe/endpoint.
n Status register (UESTAn.CFGOK) is set only if the configured size and number of banks
are correct compared to their maximal allowed values for the endpoint and to the maximal
FIFO size (i.e. the DPRAM size), so the value of CFGOK does not consider memory
allocation conflicts.
of the USB pad is off, and internal pull-down with strong value(15K) are set in both DP/DM to
avoid floating lines.
shows the pad behavior.
illustrates the pad events leading to a PAD state change.
Idle
| DETACH = 1
| Suspend
USBE = 0
& DETACH = 0
& Suspend
USBE = 1
Active
365
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