AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 112

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AT32UC3C2256C

Manufacturer Part Number
AT32UC3C2256C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2256C

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32002F–03/2010
The complete signal list of the AUX port is shown in Table 9-18.
Table 9-18.
Auxiliary
pins
MCKO
MDO
MSEO
EVTO
EVTI
RESET_
N
Width
1
6
2
1
1
1
Auxiliary pins
Direct
ion
O
O
O
O
I
I
Description
Message Clockout (MCKO) is a free-running output clock to
development tools for timing of MDO and MSEO pin functions.
Message Data Out (MDO[5:0]) are output pins used for all messages
generated by the device. In single datarate mode, external latching of
MDO shall occur on rising edge of MCKO. In double datarate mode,
external latching of MDO shall occur on both edges of MCKO.
Message Start/End Out (MSEO[1:0]) pins indicate when a message
on the MDO pins has started, when a variable length packet has
ended, and when the message has ended. In single datarate mode,
external latching of MSEO shall occur on rising edge of MCKO. In
double datarate mode, external latching of MSEO shall occur on both
edges of MCKO.
Event Out (EVTO) is an output pin which can be configured to toggle
every time a message is inserted into the Transmit Queue, when the
CPU entered OCD Mode, or when a breakpoint or watchpoint hit
occured, as configured by the EOS bits in the Development Control
register .
Event In (EVTI) is an input which, when a high-to-low transition occurs,
a processor is halted (breakpoint) or program and data
synchronization messages are transmitted from the OCD controller, as
configured by the EIC bits in the Development Control register.
System reset
AVR32
112

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