AT89C51ID2 Atmel Corporation, AT89C51ID2 Datasheet - Page 119

• Manufacturer Part Number: AT89C51ID2
• Manufacturer: Atmel Corporation

Specifications of AT89C51ID2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 2
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

119
AT89C51ID2
Table 90. Default Values
After programming the part by ISP, the BSB must be cleared (00h) in order to allow the
application to boot at 0000h.
The content of the Software Security Byte (SSB) is described in Table 90 and Table 93.
To assure code protection from a parallel access, the HSB must also be at the required
level.
Table 91. Software Security Byte
Table 92.
The two lock bits provide different levels of protection for the on-chip code and data,
when programmed as shown to Table 93.
Mnemonic
Number
Bit
SBV
HSB
BSB
SSB
1-0
7
-
7
6
5
4
3
2
Mnemonic Description
Software Boot Vector
Copy of the Hardware security byte
Boot Status Byte
Software Security Byte
Copy of the Manufacturer Code
Copy of the Device ID #1: Family Code
Copy of the Device ID #2: memories size
and type
Copy of the Device ID #3: name and
revision
LB1-0
Bit
6
-
-
-
-
-
-
-
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
Reserved
Do not clear this bit.
User Memory Lock Bits
See Table 93
Definition
5
-
4
-
3
-
Default value
101x 1011b
0FFh
ECh
FCh
FFh
D7h
EFh
58h
2
-
ATMEL
C51 X2, Electrically Erasable
AT89C51ID2 64KB
AT89C51ID2 64KB, Revision
0
LB1
Description
1
4289C–8051–11/05
LB0
0