AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 144

• Manufacturer Part Number: AT89C51RE2
• Manufacturer: Atmel Corporation

Specifications of AT89C51RE2

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Spi: 1
• Uart: 2
• Sram (kbytes): 8.25
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART/OCD
• Watchdog: Yes

Figure 55. Format and State in the Slave Transmitter Mode
Table 105. Status in Slave Transmitter Mode
144
(SSCS)
Status
Code
A8h
B0h
B8h
Reception of the
own slave address
and one or more
data bytes
Arbitration lost as master
and addressed as slave
Last data byte transmitted.
Switched to not addressed
slave (AA=0)
AT89C51RE2
Status of the 2-wire bus and
Arbitration lost in SLA+R/W as
master; own SLA+R has been
Data byte in SSDAT has been
transmitted; NOT ACK has
received; ACK has been
received; ACK has been
Own SLA+R has been
2-wire hardware
From master to slave
From slave to master
been received
returned
returned
S
SLA
Load data byte or
Load data byte or
Load data byte or
To/from SSDAT
Load data byte
Load data byte
Load data byte
Application Software Response
R
Data
n
B0h
A8h
A
A
STA
X
X
X
X
X
X
A
To SSCON
STO
Data
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
0
0
0
0
0
0
SI
0
0
0
0
0
0
B8h
A
AA
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Last data byte will be transmitted and NOT ACK
will be received
Data byte will be transmitted and ACK will be
received
Data
C8h
C0h
A
A
All 1’s
P or S
P or S
7663D–8051–10/08