AT89C51RE2 Atmel Corporation, AT89C51RE2 Datasheet - Page 54

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AT89C51RE2

Manufacturer Part Number
AT89C51RE2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51RE2

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
34
Spi
1
Uart
2
Sram (kbytes)
8.25
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/OCD
Watchdog
Yes

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Bootloader
Description
Entry points
Boot Process
Description
Hardware boot process
request detection
Communication link
detection
54
AT89C51RE2
PSEN=0
Yes
After reset only one bootloader entry point is possible. This entry point stands at address 0x0000
of the boot ROM memory. This entry point executes the boot process of the bootloader.
The bootloader entry point can be selected through two processes:
At reset, if the hardware conditions are applied, the bootloader entry point is accessed and
executed.
At reset, if the hardware conditions are not set and the BRV2-0 is programmed ‘011’, the boot-
loader entry point is accessed and the bootprocess is started.
The boot process consists in three main operations:
The hardware boot process request is detected when the hardware conditions (under reset,
EA=1 and PSEN=0) are received by the processor or when no hardware condition is applied
and the BRV2:0 is configured ‘011’.
Two interfaces are available for ISP:
RESET
EA=1
The hardware boot process request detection
The communication link detection (Uart or OCD)
The start-up of the bootloader
UART0
OCD UART
Communication link
detector / initialiser
PC = RM0 @0x0000h
Start Bootloader
No
BRV=’011’
Yes
No
BRV=’100’
Yes
No
BRV=’101’
Yes
Start Application
No
BRV=’110’
Yes
7663E–8051–10/08
No

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