ATmega1284P Atmel Corporation, ATmega1284P Datasheet - Page 24
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ATmega1284P
Manufacturer Part Number
ATmega1284P
Description
Manufacturer
Atmel Corporation
Specifications of ATmega1284P
Flash (kbytes)
128 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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8.6
8.6.1
8.6.2
8.6.3
8272C–AVR–06/11
Register Description
EEARH and EEARL – The EEPROM Address Register
EEDR – The EEPROM Data Register
EECR – The EEPROM Control Register
• Bits 15:12 – Reserved
These bits are reserved bits in the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
and will always read as zero.
• Bits 11:0 – EEAR8:0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512/1K/2K/4Kbytes EEPROM space. The EEPROM data bytes are addressed linearly between
0 and 511/1023/2047/4096. The initial value of EEAR is undefined. A proper value must be writ-
ten before the EEPROM may be accessed.
• Bits 7:0 – EEDR7:0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:6 – Reserved
These bits are reserved bits in the ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P
and will always read as zero.
• Bits 5:4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM Programming mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
Bit
0x22 (0x42)
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
ATmega164A/PA/324A/PA/644A/PA/1284/P
EEAR7
MSB
R/W
R/W
15
R
X
–
7
0
R
7
0
7
–
0
EEAR6
R/W
R/W
14
R
–
6
0
X
R
6
–
0
6
0
EEAR5
EEPM1
R/W
R/W
R/W
13
–
5
R
0
X
X
5
5
0
EEAR4
EEPM0
R/W
R/W
R/W
12
R
X
–
4
0
X
4
4
0
EEAR11
EEAR3
EERIE
R/W
R/W
R/W
R/W
11
X
X
3
3
0
3
0
EEAR10
EEMPE
EEAR2
R/W
R/W
R/W
R/W
10
2
0
X
X
2
0
2
EEAR9
EEAR1
EEPE
R/W
R/W
R/W
R/W
X
1
0
1
X
X
9
1
EEAR8
EEAR0
EERE
LSB
R/W
R/W
R/W
R/W
X
X
0
0
0
0
8
0
EEARH
EEARL
EEDR
EECR
24
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