ATmega1284P Atmel Corporation, ATmega1284P Datasheet - Page 254

• Manufacturer Part Number: ATmega1284P
• Manufacturer: Atmel Corporation

Specifications of ATmega1284P

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

23.7.4
8272C–AVR–06/11
ADC Accuracy Definitions
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition (at
Figure 23-10. Offset Error
• Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the last
Figure 23-11. Gain Error
• Integral Non-linearity (INL): After adjusting for offset and gain error, the INL is the maximum
0.5 LSB). Ideal value: 0 LSB.
transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum).
Ideal value: 0 LSB
deviation of an actual transition compared to an ideal transition for any code. Ideal value: 0
LSB.
ATmega164A/PA/324A/PA/644A/PA/1284/P
Output Code
Output Code
Offset
Error
Gain
Error
V
V
REF
REF
Input Voltage
Input Voltage
n
Ideal ADC
Actual ADC
Ideal ADC
Actual ADC
-1.
REF
in 2
n
steps
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