ATmega168PA Atmel Corporation, ATmega168PA Datasheet - Page 136
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ATmega168PA
Manufacturer Part Number
ATmega168PA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega168PA
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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16.11 Register Description
16.11.1
8271D–AVR–05/11
TCCR1A – Timer/Counter1 Control Register A
Figure 16-13
Figure 16-13. Timer/Counter Timing Diagram, with Prescaler (f
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 16-1.
Bit
(0x80)
Read/Write
Initial Value
COM1A1/COM1B1
and ICF n
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
0
0
1
1
OCRnx
TCNTn
TCNTn
as TOP)
(clk
clk
clk
I/O
(FPWM)
shows the same timing data, but with the prescaler enabled.
I/O
Tn
/8)
COM1A1
(if used
Compare Output Mode, non-PWM
R/W
7
0
ATmega48A/PA/88A/PA/168A/PA/328/P
COM1A0
COM1A0/COM1B0
R/W
6
0
TOP - 1
TOP - 1
Old OCRnx Value
0
1
0
1
COM1B1
R/W
Table 16-1
5
0
COM1B0
R/W
4
0
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match.
Clear OC1A/OC1B on Compare Match (Set output to
low level).
Set OC1A/OC1B on Compare Match (Set output to
high level).
shows the COM1x1:0 bit functionality when the
TOP
TOP
R
3
0
–
BOTTOM
TOP - 1
clk_I/O
R
2
0
–
New OCRnx Value
/8)
WGM11
R/W
1
0
BOTTOM + 1
TOP - 2
WGM10
R/W
0
0
TCCR1A
136
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