ATmega324P Automotive Atmel Corporation, ATmega324P Automotive Datasheet - Page 155

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ATmega324P Automotive

Manufacturer Part Number
ATmega324P Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega324P Automotive

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
7674F–AVR–09/09
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 15-5.
Table 15-6
mode.
Table 15-6.
Note:
Table 15-7
rect PWM mode.
Table 15-7.
Note:
• Bits 3:2 – Res: Reserved Bits
These bits are reserved bits in the ATmega164P/324P/644P and will always read as zero.
COM2B1
COM2B1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 146
pare Match is ignored, but the set or clear is done at TOP. See
page 148
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2B0
COM2B0
COM2B0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 15-5
Description
Normal port operation, OC2B disconnected.
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match when up-counting. Set OC2B on
Compare Match when down-counting.
Set OC2B on Compare Match when up-counting. Clear OC2B on
Compare Match when down-counting.
shows the COM2B1:0 bit functionality when the WGM22:0 bits
ATmega164P/324P/644P
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
155

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