ATmega324P Automotive Atmel Corporation, ATmega324P Automotive Datasheet - Page 193

• Manufacturer Part Number: ATmega324P Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega324P Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7674F–AVR–09/09
Table 17-4.
Note:
• Bits 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPMn setting.
If a mismatch is detected, the UPEn Flag in UCSRnA will be set.
Table 17-5.
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Table 17-6.
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
Table 17-7.
UMSELn1
UCSZn2
UPMn1
1. See
0
0
0
0
1
0
0
1
1
0
1
1
operation
UMSELn Bits Settings
UPMn Bits Settings
USBS Bit Settings
UCSZn Bits Settings
USBSn
“USART in SPI Mode” on page 199
0
1
UCSZn1
UMSELn0
UPMn0
0
0
1
1
0
0
1
0
1
1
0
1
Stop Bit(s)
1-bit
2-bit
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
Mode
Synchronous USART
(Reserved)
Master SPI (MSPIM)
UCSZn0
for full description of the Master SPI Mode (MSPIM)
ATmega164P/324P/644P
0
1
0
1
0
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
(1)
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