ATmega329PA Atmel Corporation, ATmega329PA Datasheet - Page 250

• Manufacturer Part Number: ATmega329PA
• Manufacturer: Atmel Corporation

Specifications of ATmega329PA

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

24.5.3
8284D–AVR–6/11
LCDFRR – LCD Frame Rate Register
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
Table 24-3.
Note:
• Bit 7 – Reserved Bit
This bit is reserved and will always read as zero.
• Bits 6:4 – LCDPS[2:0]: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be further
divided by setting the clock divide bits (LCDCD[2:0]). The different selections are shown in
24-4 on page
ing the LCD module.
Table 24-4.
Bit
(0xE6)
Read/Write
Initial Value
LCDPM3
LCDPS2
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1. LCDPM3 is reserved and will always read as zero in ATmega329A/329PA/649A/649P.
LCDPM2
250. Together they determine the prescaled LCD clock (clk
LCDPS1
LCD Port Mask (Values in bold are only available in
ATmega3290A/3290PA/6490A/6490P) (Continued)
LCD Prescaler Select
R
7
–
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
LCDPS2
R/W
LCDPM1
6
0
LCDPS0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
LCDPS1
R/W
5
0
LCDPM0
Output from
Prescaler
clk
clk
clk
clk
clk
clk
1
0
1
0
1
0
1
0
1
0
1
0
1
LCDPS0
LCD
LCD
LCD
R/W
LCD
LCD
LCD
4
0
/128
/256
/512
/16
/64
/N
I/O Port in Use as
R
Segment Driver
3
–
0
Applied Prescaled LCD Clock Frequency
SEG0:36
SEG0:38
SEG0:39
SEG0:18
SEG0:20
SEG0:22
SEG0:23
SEG0:24
SEG0:26
SEG0:28
SEG0:30
SEG0:32
SEG0:34
when LCDCD2:0 = 0, Duty = 1/4, and
LCDCD2
R/W
2
0
Frame Rate = 64Hz
LCDCD1
R/W
130kHz
260kHz
1
0
8.1kHz
33kHz
66kHz
LCD_PS
Maximum Number
LCDCD0
of Segments
), which is clock-
R/W
0
0
19
21
23
24
25
27
29
31
33
35
37
39
40
LCDFRR
Table
250