ATmega64M1 Automotive Atmel Corporation, ATmega64M1 Automotive Datasheet - Page 207
ATmega64M1 Automotive
Manufacturer Part Number
ATmega64M1 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATMEGA16M1_AUTOMOTIVE.pdf
(25 pages)
3.ATMEGA16M1_AUTOMOTIVE.pdf
(367 pages)
Specifications of ATmega64M1 Automotive
Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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17.4.1
17.4.2
7647G–AVR–09/11
LIN Overview
UART Overview
The LIN/UART controller is designed to match as closely as possible to the LIN software appli-
cation structure. The LIN software application is developed as independent tasks, several
s l a v e t a s k s a n d o n e m a s t e r t a s k ( c . f .
ATmega16/32/64/M1/C1 conforms to this perspective. The only link between the master task
and the slave task will be at the cross-over point where the interrupt routine is called once a
new identifier is available. Thus, in a master node, housing both master and slave task, the Tx
LIN Header function will alert the slave task of an identifier presence. In the same way, in a
slave node, the Rx LIN Header function will alert the slave task of an identifier presence.
When the slave task is warned of an identifier presence, it has first to analyze it to know what
to do with the response. Hardware flags identify the presence of one of the specific identifiers
from 60 (0x3C) up to 63 (0x3F).
For LIN communication, only four interrupts need to be managed:
The wake-up management can be automated using the UART wake-up capability and a node
sending a minimum of 5 low bits (0xF0) for LIN 2.1 and 8 low bits (0x80) for LIN 1.3. Pin
change interrupt on LIN wake-up signal can be also used to exit the device of one of its sleep
modes.
Extended frame identifiers 62 (0x3E) and 63 (0x3F) are reserved to allow the embedding of
user-defined message formats and future LIN formats. The byte transfer mode offered by the
UART will ensure the upwards compatibility of LIN slaves with accommodation of the LIN
protocol.
The LIN/UART controller can also function as a conventional UART. By default, the UART
operates as a full duplex controller. It has local loop back circuitry for test purposes. The UART
has the ability to buffer one character for transmit and two for receive. The receive buffer is
made of one 8-bit serial register followed by one 8-bit independent buffer register. Automatic
flag management is implemented when the application puts or gets characters, thus reducing
the software overhead. Because transmit and receive services are independent, the user can
save one device pin when one of the two services is not used. The UART has an enhanced
baud rate generator providing a maximum error of 2% whatever the clock frequency and the
targeted baud rate.
• LIDOK: New LIN identifier available,
• LRXOK: LIN response received,
• LTXOK: LIN response transmitted,
• LERR: LIN Error(s).
Atmel ATmega16/32/64/M1/C1
S e c t i o n 1 7 . 3 . 4 o n p a g e 2 0 6
) . T h e
207
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