ATmega8535 Atmel Corporation, ATmega8535 Datasheet - Page 17

• Manufacturer Part Number: ATmega8535
• Manufacturer: Atmel Corporation

Specifications of ATmega8535

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

SRAM Data Memory
2502K–AVR–10/06
Figure 9 shows how the ATmega8535 SRAM Memory is organized.
The 608 Data Memory locations address the Register File, the I/O Memory, and the
internal data SRAM. The first 96 locations address the Register File and I/O Memory,
and the next 512 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Dis-
placement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base
address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 512 bytes of inter-
nal data SRAM in the ATmega8535 are all accessible through all these addressing
modes. The Register File is described in “General Purpose Register File” on page 11.
Figure 9. Data Memory Map
I/O Registers
Register File
R29
R30
$3D
R31
$00
$01
$02
$3E
$3F
R0
R1
R2
...
...
ATmega8535(L)
Data Address Space
Internal SRAM
$001D
$005D
$001E
$005E
$005F
$025E
$025F
$0000
$0001
$0002
$001F
$0020
$0021
$0022
$0060
$0061
...
...
...
17