ATtiny2313A Atmel Corporation, ATtiny2313A Datasheet - Page 165

• Manufacturer Part Number: ATtiny2313A
• Manufacturer: Atmel Corporation

Specifications of ATtiny2313A

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 18
• Ext Interrupts: 18
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.5.2
8246B–AVR–09/11
USISR – USI Status Register
Table 16-2
used for the USI Data Register and the 4-bit counter.
Table 16-2.
• Bit 1 – USICLK: Clock Strobe
Writing a one to this bit location strobes the USI Data Register to shift one step and the counter
to increment by one, provided that the software clock strobe option has been selected by writing
USICS1:0 bits to zero. The output will change immediately when the clock strobe is executed,
i.e., during the same instruction cycle. The value shifted into the USI Data Register is sampled
the previous instruction cycle.
When an external clock source is selected (USICS1 = 1), the USICLK function is changed from
a clock strobe to a Clock Select Register. Setting the USICLK bit in this case will select the
USITC strobe bit as clock source for the 4-bit counter (see
The bit will be read as zero.
• Bit 0 – USITC: Toggle Clock Port Pin
Writing a one to this bit location toggles the USCK/SCL value either from 0 to 1, or from 1 to 0.
The toggling is independent of the setting in the Data Direction Register, but if the PORT value is
to be shown on the pin the corresponding DDR pin must be set as output (to one). This feature
allows easy clock generation when implementing master devices.
When an external clock source is selected (USICS1 = 1) and the USICLK bit is set to one, writ-
ing to the USITC strobe bit will directly clock the 4-bit counter. This allows an early detection of
when the transfer is done when operating as a master device.
The bit will read as zero.
The Status Register contains interrupt flags, line status flags and the counter value.
• Bit 7 – USISIF: Start Condition Interrupt Flag
When two-wire mode is selected, the USISIF Flag is set (to one) when a start condition has
been detected. When three-wire mode or output disable mode has been selected any edge on
the SCK pin will set the flag.
Bit
0x0E (0x2E)
Read/Write
Initial Value
USICS1
0
0
0
1
1
1
1
shows the relationship between the USICS1:0 and USICLK setting and clock source
USICS0
USISIF
Relationship between the USICS1:0 and USICLK Setting
0
0
1
0
1
0
1
R/W
7
0
USICLK
USIOIF
R/W
X
6
0
0
1
0
0
1
1
Clock Source
No Clock
Software clock strobe (USICLK)
Timer/Counter0 Compare Match
External, positive edge
External, negative edge
External, positive edge
External, negative edge
USIPF
R/W
5
0
USIDC
R
4
0
USICNT3
R/W
3
0
Table
USICNT2
ATtiny2313A/4313
R/W
2
0
4-bit Counter Clock Source
No Clock
Software clock strobe (USICLK)
Timer/Counter0 Compare Match
External, both edges
External, both edges
Software clock strobe (USITC)
Software clock strobe (USITC)
16-2).
USICNT1
R/W
1
0
USICNT0
R/W
0
0
USISR
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