ATxmega128B1 Atmel Corporation, ATxmega128B1 Datasheet - Page 11

• Manufacturer Part Number: ATxmega128B1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128B1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 53
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Segment Lcd: 160
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 10
• Input Capture Channels: 10
• Pwm Channels: 10
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

6.8
8330B–AVR–10/11
Register File
During interrupts or subroutine calls, the return address is automatically pushed on the stack.
The return address can be two or three bytes, depending on program memory size of the device.
For devices with 128KB or less of program memory, the return address is two bytes, and hence
the stack pointer is decremented/incremented by two. For devices with more than 128KB of pro-
gram memory, the return address is three bytes, and hence the SP is decremented/incremented
by three. The return address is popped off the stack when returning from interrupts using the
RETI instruction, and from subroutine calls using the RET instruction.
The SP is decremented by one when data are pushed on the stack with the PUSH instruction,
and incremented by one when data is popped off the stack using the POP instruction.
To prevent corruption when updating the stack pointer from software, a write to SPL will auto-
matically disable interrupts for up to four instructions or until the next I/O memory write.
The register file consists of 32 x 8-bit general purpose working registers with single clock cycle
access time. The register file supports the following input/output schemes:
Six of the 32 registers can be used as three 16-bit address register pointers for data space
addressing, enabling efficient address calculations. One of these address pointers can also be
used as an address pointer for lookup tables in flash program memory.
•One 8-bit output operand and one 8-bit result input
•Two 8-bit output operands and one 8-bit result input
•Two 8-bit output operands and one 16-bit result input
•One 16-bit output operand and one 16-bit result input
XMEGA B1
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