ATxmega192A3 Atmel Corporation, ATxmega192A3 Datasheet - Page 167

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ATxmega192A3

Manufacturer Part Number
ATxmega192A3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega192A3

Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.12.4
8077H–AVR–12/09
CTRLD - Control Register D
• Bit 7:5 – EVACT[2:0]: Event Action
These bits define the Event Action the timer will perform on an event according to
page
The EVSEL setting will decide which event source or sources that have the control in this case.
Table 14-5.
Selecting the any of the capture event action changes the behavior of the CCx registers and
related status and control bits to be used as for capture. The error status flag (ERRIF) will in this
configuration indicate a buffer overflow.
• Bit 4 – EVDLY: Timer Delay Event
When this bit is set, the selected event source is delayed by one peripheral clock cycle. This fea-
ture is intended for 32-bit input capture operation. Adding the event delay is necessary for
compensating for the carry propagation delay that is inserted when cascading two counters via
the Event System.
• Bit 3:0 – EVSEL[3:0]:Timer Event Source Select
These bits select the event channel source for the Timer/Counter. For the selected event chan-
nel to have any effect the Event Action bits (EVACT) must be set according to
the Event Action is set to capture operation, the selected event channel n will be the event chan-
nel source for CC channel A, and event channel (n+1)%8, (n+2)%8 and (n+3)%8 will be the
event channel source for CC channel B, C and D.
Bit
+0x03
Read/Write
Initial Value
167.
EVACT[2:0]
000
001
010
011
100
101
110
111
Timer Event Action Selection
R/W
7
0
EVACT[2:0]
R/W
6
0
Group Configuration
UPDOWN
RESTART
R/W
QDEC
CAPT
5
0
FRQ
OFF
PW
EVDLY
R/W
4
0
Event Action
None
Input Capture
Externally Controlled Up/ Down Count
Quadrature decode
Restart waveform period
Frequency Capture
Pulse Width Capture
Reserved
R/W
3
0
R/W
2
0
EVSEL[3:0]
R/W
1
0
XMEGA A
Table
R/W
0
0
Table 14-5 on
14-6. When
CTRLD
167

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