ATxmega64A3U Atmel Corporation, ATxmega64A3U Datasheet - Page 322
ATxmega64A3U
Manufacturer Part Number
ATxmega64A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A3U
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A3U-AU
Manufacturer:
ACTEL
Quantity:
101
Part Number:
ATxmega64A3U-MH
Manufacturer:
TI/德州仪器
Quantity:
20 000
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25.5.4
25.5.5
8331A–AVR–07/11
KEY
INTCTRL
–
Key Register
–
Interrupt Control Register
The KEY register is used to access the key memory. Before encryption/decryption can take
place, the key memory must be written sequentially, byte-by-byte, through the KEY register.
After encryption/decryption is done, the last subkey can be read sequentially, byte-by-byte,
through the KEY register.
Loading the initial data to the KEY register should be done after setting the appropriate AES
mode and direction.
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
These bits enable the AES interrupt and select the interrupt level, as described in
Programmable Multilevel Interrupt Controller” on page
gered when the SRIF in the STATUS register is set.
Bit
+0x04
Read/Write
Initial Value
Bit
+0x03
Read/Write
Initial Value
• Bit 7:2
• Bit 1:0
–
–
Reserved
INTLVL[1:0]: Interrupt priority and enable
R/W
7
–
R
0
7
0
R/W
R
6
–
0
6
0
R/W
R
5
–
0
5
0
R/W
R
4
–
0
4
0
KEY[7:0]
Atmel AVR XMEGA AU
R/W
R
3
–
0
3
0
132. The enabled interrupt will be trig-
R/W
2
–
R
0
2
0
R/W
R/W
1
0
1
0
INTLVL[1:0]
R/W
R/W
0
0
0
0
”Interrupts and
INTCTRL
KEY
322
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