M40800 Atmel Corporation, M40800 Datasheet - Page 284
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M40800
Manufacturer Part Number
M40800
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(21 pages)
3.M40800.pdf
(18 pages)
4.M40800.pdf
(153 pages)
Specifications of M40800
Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
40 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
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Index
Program status register format 2-13
ProgrammerÕs model 2-2
Protocol converter 5-4
Public instructions B-9
Pullup resistors B-7
R
Register organization in ARM-state
Register organization in Thumb-state
Registers 2-8
Reserved bits 2-15
Reset 2-24
Reset sequence after power up 3-33
S
Scan chain 0 B-4, B-18
Scan chain 1 B-4, B-19
Scan chain 2 B-4, B-19
Scan chain 3 B-20
Scan chains
Sequential access cycle 3-7
Sequential cycles 3-6
Signal descriptions A-3
Signal types 3-3, 4-4, A-2
Signals
Significant address bits 3-12
Simple memory cycle 3-4
SRAM compatible address timing 3-16
STC 4-10
Supervisor Mode 2-7
Index-4
mapping of Thumb-state onto
program status 2-13
relationship between ARM-state and
cells B-33
cells B-37
implementation B-3
JTAG interface B-3
address class 3-11
bus interface 3-3
clock and clock control 4-4
coprocessor interface 4-4
2-9
2-10
ARM-state 2-11
Thumb-state 2-11
Copyright © 1994-2001. All rights reserved.
Switching state 2-3
System Mode 2-7
System speed access B-31
System timing 3-30
T
T bit 2-14
TAP
Testchip data bus circuit 3-23
Testchip example system 3-22
Thumb
Thumb-state
Transistor sizes A-2
Tristate control of processor outputs
U
Undefined instruction trap 1-12
undefined instructions 6-27
Undefined Mode 2-7
Unidirectional bus timing 3-18
Unidirectional data bus 3-18
User Mode 2-7
W
Watchpoint registers B-40
Watchpoints
Word accesses 3-27
controller
state machine B-5
code 1-6
register organization 2-10
programming and reading B-41
coupling B-52
programming B-47
resetting B-6
3-21
ARM DDI 0029G
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