M40800 Atmel Corporation, M40800 Datasheet - Page 57
M40800
Manufacturer Part Number
M40800
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(21 pages)
3.M40800.pdf
(18 pages)
4.M40800.pdf
(153 pages)
Specifications of M40800
Flash (kbytes)
0 Kbytes
Pin Count
100
Max. Operating Frequency
40 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
No
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2.6.3
ARM DDI 0029G
The relationship between ARM-state and Thumb-state registers
The Thumb-state registers relate to the ARM-state registers in the following way:
•
•
•
•
•
These relationships are shown in Figure 2-5.
Thumb-state r0–r7 and ARM-state r0–r7 are identical
Thumb-state CPSR and SPSRs and ARM-state CPSR and SPSRs are identical
Thumb-state SP maps onto the ARM-state r13
Thumb-state LR maps onto the ARM-state r14
the Thumb-state PC maps onto the ARM-state PC (r15).
Copyright © 1994-2001. All rights reserved.
Figure 2-5 Mapping of Thumb-state registers onto ARM-state registers
Program counter (PC)
Saved program status
Stack pointer (SP)
Link register (LR)
Current program
register (SPSR)
status register
Thumb state
(CPSR)
r0
r1
r2
r3
r4
r5
r6
r7
Stack pointer (r13)
Link register (r14)
ARM state
Programmer’s Model
PC (r15)
CPSR
SPSR
r10
r11
r12
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
2-11
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