M55800A Atmel Corporation, M55800A Datasheet - Page 20

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M55800A

Manufacturer Part Number
M55800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M55800A

Flash (kbytes)
0 Kbytes
Pin Count
176
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
58
Ext Interrupts
58
Usb Speed
No
Usb Interface
No
Spi
1
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
72
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Table 28. EBI Read and Write Control Signals. Capacitance Limitation
Notes:
20
Symbol
T
T
CPLNRD
CPLNWR
1. If this condition is not met, the action depends on the read protocol intended for use.
2. Applicable only for chip select programmed with 0 wait state. If this condition is not met, at least one wait state must be
(1)
(2)
AT91M55800A
• Early Read Protocol: Programing an additional t
• Standard Read Protocol: Programming an additional t
programmed.
Parameter
Master Clock Low Due to NRD Capacitance
Master CLock Low Due to NWR Capacitance
DF
(Data Float Output Time) cycle.
Conditions
C
C
C
C
DF
NRD
NRD
NWR
NWR
Cycle and an additional wait state.
= 0 pF
derating
= 0 pF
derating
0.083
0.083
11.2
10.3
Min
Max
1727E–ATARM–01/04
Units
ns/pF
ns/pF
ns
ns

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