RM9200 Atmel Corporation, RM9200 Datasheet - Page 42
RM9200
Manufacturer Part Number
RM9200
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.RM9200.pdf
(350 pages)
4.RM9200.pdf
(149 pages)
5.RM9200.pdf
(41 pages)
6.RM9200.pdf
(701 pages)
Specifications of RM9200
Flash (kbytes)
0 Kbytes
Pin Count
256
Max. Operating Frequency
180 MHz
Cpu
ARM920
Hardware Qtouch Acquisition
No
Max I/o Pins
122
Ext Interrupts
122
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
1
Twi (i2c)
1
Uart
5
Ssc
3
Ethernet
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- RM9200 PDF datasheet #3
- RM9200 PDF datasheet #4
- RM9200 PDF datasheet #5
- RM9200 PDF datasheet #6
- Current page: 42 of 284
- Download datasheet (2Mb)
Introduction
1-20
Load and store sign-extended byte and
Load and store with immediate offset
High register operations and branch
Move, compare, add, and subtract
Load and store with relative offset
Add offset to stack pointer
SP-relative load and store
Load and store halfword
Push and pop registers
Multiple load and store
Unconditional branch
Long branch with link
Move shifted register
Conditional branch
Copyright © 1994-2001. All rights reserved.
Software interrupt
Add and subtract
PC-relative load
ALU operation
Load address
immediate
exchange
halfword
Format
Format
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0
0
0 0 1
0 1 0 0 0 0
0 1 0 0 0 1
0 1 0 0 1
0 1 0
0 1 0
0 1 1
1 0 0
1 0 0
1 0 1
1 0
1 0
1 1
1 1
1
1
1
0
0
1 0 1
1 1 0
1 1 1
Figure 1-6 Thumb instruction set formats
0
0
1 1 0
1 1 L
0 0 L
0 1
B L
1
1 L B 0
1 H S 1
0 L
1 L
0 SP
Op
Op
H
1
1 1 1 1
0
Cond
1
0 0 0 S
1 0 R
Op
Rd
Rd
Rd
Rd
Rb
Offset5
Offset5
Offset5
Op
offset3
Op
Rn/
H1 H2
Ro
Ro
Offset11
Offset
Rs/Hs
Softset8
Offset8
Value8
Word8
Word8
Word8
Rb
Rb
Rb
Rb
Rs
Rs
Rs
SWord7
Rlist
Rlist
ARM DDI 0029G
RdHd
Rd
Rd
Rd
Rd
Rd
Rd
Rd
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