SAM3N2B Atmel Corporation, SAM3N2B Datasheet - Page 596
SAM3N2B
Manufacturer Part Number
SAM3N2B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N2B
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Figure 31-15. Predefined Connection of the Quadrature Decoder with Timer Counters
31.6.14.2
596
596
TIOA0
TIOB0
TIOB1
SAM3N
SAM3N
Input Pre-processing
PHA
PHB
IDX
(Filter + Edge
Detect + QD)
Quadrature
Decoder
Interruptions can be generated on different events.
A compare function (using TC_RC register) is available on channel 0 (speed/position) or chan-
nel 1 (rotation) and can generate an interrupt by means of the CPCS flag in the TC_SR
registers.
Input pre-processing consists of capabilities to take into account rotary sensor factors such as
polarities and phase definition followed by configurable digital filtering.
Each input can be negated and swapping PHA, PHB is also configurable.
PHEdges
Index
Direction
TIOA0
TIOB0
TIOB1
1
QDEN
SPEEDEN
1
1
1
QDEN
TIOA
TIOB
XC0
TIOB
XC0
1
1
Reset pulse
XC0
XC0
Speed Time Base
Timer/Counter
Channel 0
Speed/Position
Timer/Counter
Channel 1
Rotation
Timer/Counter
Channel 2
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
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