SAM3N2B Atmel Corporation, SAM3N2B Datasheet - Page 662
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SAM3N2B
Manufacturer Part Number
SAM3N2B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N2B
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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• FWUP: Fast Wake Up
• FREERUN: Free Run Mode
• PRESCAL: Prescaler Rate Selection
• STARTUP: Start Up Time
• TRACKTIM: Tracking Time
• USEQ: Use Sequence Enable
662
662
ADCClock = MCK / ( (PRESCAL+1) * 2 )
Tracking Time = (TRACKTIM + 1) * ADCClock periods.
Value
Value
Value
Value
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
0
1
0
1
SAM3N
SAM3N
NUM_ORDER
REG_ORDER
SUT112
SUT512
SUT576
SUT640
SUT704
SUT768
SUT832
SUT896
SUT960
SUT16
SUT24
SUT64
SUT80
SUT96
Name
Name
Name
SUT0
SUT8
OFF
OFF
Name
ON
ON
Description
Normal Sleep Mode: The sleep mode is defined by the SLEEP bit
Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF
Description
Normal Mode
Free Run Mode: Never wait for any trigger.
Description
0 periods of ADCClock
8 periods of ADCClock
16 periods of ADCClock
24 periods of ADCClock
64 periods of ADCClock
80 periods of ADCClock
96 periods of ADCClock
112 periods of ADCClock
512 periods of ADCClock
576 periods of ADCClock
640 periods of ADCClock
704 periods of ADCClock
768 periods of ADCClock
832 periods of ADCClock
896 periods of ADCClock
960 periods of ADCClock
Description
Normal Mode: The controller converts channels in a simple numeric order.
User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2
registers.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
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