SAM7L128 Atmel Corporation, SAM7L128 Datasheet - Page 139

• Manufacturer Part Number: SAM7L128
• Manufacturer: Atmel Corporation

Specifications of SAM7L128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 36 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 80
• Ext Interrupts: 80
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Segment Lcd: 40
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 460
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 6
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.8 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

5.8.2
ARM DDI 0029G
Instructions
Communications through the DCC
The function of each register bit is as follows:
Bits 31:28
Bits 27:2
Bit 1
Bit 0
From the point of view of the debugger, the registers are accessed through scan chain 2
in the usual way. From the point of view of the processor, these registers are accessed
through coprocessor register transfer instructions.
Use the instructions listed in Table 5-1 to access the DCC registers.
Because the Thumb instruction set does not contain coprocessor instructions, you are
advised to access this data through SWI instructions when in Thumb state.
You can send and receive messages through the DCC. The following sections describe:
•
•
•
Sending a message to the debugger on page 5-18
Receiving a message from the debugger on page 5-18
Interrupt driven use of the DCC on page 5-18.
Copyright © 1994-2001. All rights reserved.
Explanation
Places the value from the DCC control register into the destination register (Rd)
Writes the value in the source register (Rn) to the DCC data write register
Returns the value in the DCC data read register into Rd
Contain a fixed pattern that denotes the EmbeddedICE version
number, in this case 0001.
Reserved.
If W is clear, the DCC data write register is ready to accept data
from the processor.
If W is set, there is data in the DCC data write register and the
debugger can scan it out.
If R is clear, the DCC data read register is free and data can be
placed there from the debugger.
If R is set, DCC data read register has data that has not been read
by the processor and the debugger must wait.
Table 5-1 DCC register access instructions
Debug Interface
5-17