SAM7XC256 Atmel Corporation, SAM7XC256 Datasheet - Page 262
SAM7XC256
Manufacturer Part Number
SAM7XC256
Description
Manufacturer
Atmel Corporation
Specifications of SAM7XC256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Debug in Depth
B-44
ENABLE
For each of the bits 7:0 in the control value register, there is a corresponding bit in the
control mask register. These bits remove the dependency on particular signals.
Copyright © 1994-2001. All rights reserved.
In the ARM7TDMI core EmbeddedICE Logic, the RANGEOUT
output of Watchpoint 1 is connected to the RANGE input of
Watchpoint 0. Connection enables the two watchpoints to be
coupled for detecting conditions that occur simultaneously, such
as for range checking.
When a watchpoint match occurs, the internal BREAKPT signal
is asserted only when the ENABLE bit is set. This bit exists only
in the value register. It cannot be masked.
ARM DDI 0029G
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