SAM7XC256 Atmel Corporation, SAM7XC256 Datasheet - Page 93
SAM7XC256
Manufacturer Part Number
SAM7XC256
Description
Manufacturer
Atmel Corporation
Specifications of SAM7XC256
Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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ARM DDI 0029G
ARM7TDMI test chip or product
ARM7TDMI core
At the core level, TBE and DBE are inactive, tied HIGH, because in a packaged part
you do not have to manually force the internal buses into a high impedance state. At the
pad level, the test chip signal EDBE is used by the bus control logic to allow the external
memory controller to arbitrate the bus and asynchronously disable the ARM7TDMI
core test chip if necessary.
scan
scan
scan
cell
cell
cell
Note
Copyright © 1994-2001. All rights reserved.
MCLK
DBE
nENOUT
nENIN
TBE
D[31:0]
Vdd
Vdd
Vss
nEDBE
Figure 3-17 Test chip data bus circuit
nEN1
nEN2
Pad
Memory Interface
MCLK
EDBE
XD[31:0]
3-23
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