SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 2

no-image

SAM9M11

Manufacturer Part Number
SAM9M11
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M11

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
1. Description
The SAM9M11 is a multimedia enabled mid-range ARM926-based embedded MPU running at
400MHz, combining user interfaces, video playback and connectivity. It includes hardware video
decoder, LCD Controller, resistive touchscreen, camera interface, audio, Ethernet 10/100 and
high speed USB and SDIO.
The hardware video decoder supports H.264, MPEG-4, MPEG-2, VC-1, H.263 up to D1 (720 x
576 pixels) or WVGA (800 x 480) resolutions at 30 frames per second (fps). The SAM9M11 also
provides hardware image post-processing, such as image scaling, color conversion and image
rotation.
The SAM9M11 supports the latest generation of DDR2 and NAND Flash memory interfaces for
program and data storage. An internal 133 MHz multi-layer bus architecture associated with 39
DMA channels, a dual external bus interface and distributed memory including a 64-KByte
SRAM which can be configured as a tightly coupled memory (TCM) sustains the high bandwidth
required by the processor and the high speed peripherals.
On-chip hardware accelerators with DMA support enable high-speed data encryption and
authentication of the transferred data or application. Supported standards are up to 256-bit AES,
FIPS PUB 46-3 compliant TDES and FIPS Publication 180-2 compliant SHA1 and SHA256. A
True Random Number Generator is embedded for key generation and exchange protocols.
The I/Os support 1.8V or 3.3V operation, which are independently configurable for the memory
interface and peripheral I/Os. This feature completely eliminates the need for any external level
shifters. In addition it supports 0.8 ball pitch package for low cost PCB manufacturing.
The SAM9M11 power management controller features efficient clock gating and a battery
backup section minimizing power consumption in active and standby modes.
The SAM9M11 device is particularly well suited for media-rich displays and control panels in
home and commercial buildings, POS terminals, entertainment systems, internet appliances and
medical applications.
SAM9M11
2
6437CS–ATARM–8-Apr-11

Related parts for SAM9M11