SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 52

• Manufacturer Part Number: SAM9M11
• Manufacturer: Atmel Corporation

Specifications of SAM9M11

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Dac Resolution (bits): No
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

10.18 Triple Data Encryption Standard (TDES)
10.19 Secure Hash Algorithm (SHA)
52
SAM9M11
• 8-, 16-, 32-, 64- and 128-bit Data Sizes Possible in CFB Mode
• Last Output Data Mode Allows Optimized Message Authentication Code (MAC) Generation
• Hardware Counter Measures against Differential Power Analysis Attacks
• Connected to the DMA Controller to optimize Data Transfers for all Operating Modes
• 256-bit Cryptographic Key
• 16 Clock Cycles Encryption/Decryption Processing Time with a 256-bit Cryptographic Key
• Support of the Five Standard Modes of Operation Specified in the NIST Special Publication
• Supports Single Data Encryption Standard (DES) and Triple Data Encryption Algorithm
• Compliant with FIPS Publication 46-3, Data Encryption Standard (DES)
• 64-bit Cryptographic Key for TDES
• Two-key or Three-key Algorithms for TDES
• 18-clock Cycles Encryption/Decryption Processing Time for DES
• 50-clock Cycles Encryption/Decryption Processing Time for TDES
• Support the Four Standard Modes of Operation specified in the FIPS Publication 81, DES
• 8-, 16-, 32-, 64- and 128-bit Data Sizes Possible in CFB Mode
• Last Output Data Mode Allows Optimized Message (Data) Authentication Code (MAC)
• Connection to PDC Channel Capabilities Optimizes Data Transfers for all Operating Modes
• Supports Secure Hash Algorithm (SHA1 and SHA256)
• Compliant with FIPS Publication 180-2
• Configurable Processing Period:
800- 38A, Recommendation for Block Cipher Modes of Operation - Methods and Techniques:
(TDEA or TDES)
Modes of Operation
Generation
– Electronic Code Book (ECB)
– Cipher Block Chaining (CBC)
– Cipher Feedback (CFB)
– Output Feedback (OFB)
– Counter (CTR)
– One Channel for the Receiver, One Channel for the Transmitter
– Next Buffer Support
– Electronic Code Book (ECB)
– Cipher Block Chaining (CBC)
– Cipher Feedback (CFB)
– Output Feedback (OFB)
– One Channel for the Receiver, One Channel for the Transmitter
– Next Buffer Support
6437CS–ATARM–8-Apr-11