SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 26

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SAM9M11

Manufacturer Part Number
SAM9M11
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9M11

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Dac Resolution (bits)
No
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
7.2.4.1
7.2.4.2
7.3
7.3.1
26
External Memories
SAM9M11
DDRSDRC0 Multi-port DDRSDR Controller
BMS = 1, boot on embedded ROM
BMS = 0, boot on external memory
The system boots on Boot Program.
For optimization purpose, nothing else is done. To speed up the boot sequence user pro-
grammed software should perform a complete configuration:
The SAM9M11 features a Multi-port DDR2 Interface and an External Bus Interface allowing to
connect to a wide range of external memories and to any parallel peripheral.
Four AHB Interfaces, Management of All Accesses Maximizes Memory Bandwidth and Mini-
mizes Transaction Latency.
• Boot on on-chip RC
• Enable the 32768 Hz oscillator
• Auto baudrate detection
• Downloads and runs an application from external storage media into internal SRAM
• Downloaded code size depends on embedded SRAM size
• Automatic detection of valid application
• Bootloader on a non-volatile memory
• SAM-BA Boot in case no valid program is detected in external NVM, supporting
• Boot on on-chip RC
• Boot with the default configuration for the Static Memory Controller, byte select mode, 16-bit
• Enable the 32768 Hz oscillator if best accuracy needed
• Program the PMC (main oscillator enable or bypass mode)
• Program and Start the PLL
• Reprogram the SMC setup, cycle, hold, mode timings registers for EBI CS0 to adapt them to
• Switch the main clock to the new value
• Supports AHB Transfers:
• Supports DDR2, LPDDR
• Numerous Configurations Supported
data bus, Read/Write controlled by Chip Select, allows boot on 16-bit non-volatile memory.
the new clock
– SPI DataFlash/SerialFlash connected on NPCS0 of the SPI0
– SDCard
– NandFlash
– EEPROM connected on TWI0
– Serial communication on a DBGU
– USB Device HS Port
– Word, Half Word, Byte Access.
– 2K, 4K, 8K, 16K Row Address Memory Parts
6437CS–ATARM–8-Apr-11

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