AT32UC3C1512C Automotive Atmel Corporation, AT32UC3C1512C Automotive Datasheet - Page 995
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AT32UC3C1512C Automotive
Manufacturer Part Number
AT32UC3C1512C Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.AT32UC3C0512C_AUTOMOTIVE.pdf
(1312 pages)
3.AT32UC3C0512C_AUTOMOTIVE.pdf
(107 pages)
- AT90CAN128_AUTOMOTIVE PDF datasheet
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #2
- AT32UC3C0512C_AUTOMOTIVE PDF datasheet #3
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33.7.1
Name:
Access Type:
Offset:
Reset Value:
This register can only be written if the WPSWS0 and WPHWS0 bits are cleared in
1028.
• CLKSEL: CCK Source Clock Selection
CAUTION: After writing CLKSEL to a new value, no write to any PWM registers must be attempted before a delay of 2
master clock periods (CLK_PWM). This is the time needed by the PWM to switch the internal clock CCK.
9166C–AVR-08/11
CLKSEL
31
23
15
7
-
0: The PWM internal clock CCK is driven by the master clock CLK_PWM.
1: The PWM internal clock CCK is driven by the generic clock GCLK.
Clock Register
30
22
14
6
-
-
CLK
Read/Write
0x000
0x00000000
29
21
13
5
-
-
28
20
12
4
-
-
DIVB
DIVA
27
19
11
3
26
18
10
2
”Write Protect Status Register” on page
PREB
PREA
25
17
9
1
AT32UC3C
24
16
8
0
995
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