SAM3A4C Atmel Corporation, SAM3A4C Datasheet - Page 1429
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SAM3A4C
Manufacturer Part Number
SAM3A4C
Description
Manufacturer
Atmel Corporation
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45.10.6
45.10.6.1
Table 45-47. SMC Read Signals - NRD Controlled (READ_MODE = 1)
11057A–ATARM–17-Feb-12
Symbol
SMC
SMC
SMC
SMC
SMC
SMC
SMC
1
2
3
4
5
6
7
SMC Timings
Read Timings
Parameter
Data Setup before NRD High
Data Hold after NRD High
Data Setup before NRD High
Data Hold after NRD High
A2 - A25 Valid before NRD High
NCS low before NRD High
NRD Pulse Width
NBS0/A0, NBS1, NBS2/A1, NBS3,
VDDIO Supply
Figure 45-27. Min and Max Access Time of Output Signals
SMC Timings are given with the following conditions.
VDDIO = 1.62V @ 30 pF
VDDIO = 3V @ 50 pF
Timings are given assuming a capacitance load on data, control and address pads:
In the following tables t
HOLD or NO HOLD SETTINGS (nrd hold
NO HOLD SETTINGS (nrd hold = 0)
TK (CKI =0)
TK (CKI =1)
HOLD SETTINGS (nrd hold
nrd pulse - ncs
TF/TD
CPMCK
(nrd setup +
(nrd setup +
nrd pulse)*
t
t
nrd pulse *
rd setup) *
CPMCK
CPMCK
t
CPMCK
1.8V
22.5
20.3
0
0
is MCK period. Timing extraction
(2)
- 20
- 20
- 3
Min
nrd pulse - ncs
(nrd setup +
(nrd setup +
nrd pulse)*
t
t
nrd pulse *
rd setup) *
CPMCK
CPMCK
t
CPMCK
3.3V
SSC
18
16
SSC
0
0
(3)
- 20
- 20
0max
0min
- 3
0)
0, nrd hold = 0)
1.8V
(2)
Max
3.3V
SAM3X/A
(3)
Units
ns
ns
ns
ns
ns
ns
ns
1429
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