AD7711A Analog Devices, AD7711A Datasheet - Page 25

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AD7711A

Manufacturer Part Number
AD7711A
Description
CMOS, 24-Bit Sigma-Delta, Signal Conditioning ADC with RTD Current Source
Manufacturer
Analog Devices
Datasheet

Specifications of AD7711A

Resolution (bits)
24bit
# Chan
2
Sample Rate
19.5kSPS
Interface
Ser
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
Bip (Vref)/(PGA Gain),Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC

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AD7711A–8051 Interface
Figure 17 shows an interface between the AD7711A and the
8XC51 microcontroller. The AD7711A is configured for its exter-
nal clocking mode, while the 8XC51 is configured in its Mode 0
serial interface mode. The DRDY line from the AD7711A is
connected to the Port P1.2 input of the 8XC51, so the DRDY
REV. D
8XC51
Figure 16. Flowchart for Single Write Operation
to the AD7711A
Figure 17. AD7711A to 8XC51 Interface
P1.0
P1.2
P1.3
P3.0
P1.1
P3.1
WRITE DATA FROM
ACCUMULATOR TO
LOAD DATA FROM
CONFIGURE AND
INITIALIZE C/ P
ACCUMULATOR
SERIAL BUFFER
SERIAL PORT
RFS, TFS AND
ADDRESS TO
TFS AND A0
TFS AND A0
ORDER OF
REVERSE
A0 HIGH
START
BRING
BRING
BRING
HIGH
END
BITS
LOW
DV
DD
3
SYNC
RFS
DRDY
A0
SDATA
SCLK
MODE
TFS
AD7711A
–25–
line is polled by the 8XC51. The DRDY line can be connected
to the INT1 input of the 8XC51 if an interrupt driven system is
preferred.
Table VII shows some typical 8XC51 code used for a single
24-bit read from the output register of the AD7711A. Table VIII
shows some typical code for a single write operation to the con-
trol register of the AD7711A. The 8XC51 outputs the LSB first
in a write operation while the AD7711A expects the MSB first
so the data to be transmitted has to be rearranged before being
written to the output serial register. Similarly, the AD7711A
outputs the MSB first during a read operation while the 8XC51
expects the LSB first. Therefore, the data read into the serial
buffer needs to be rearranged before the correct data-word from
the AD7711A is available in the accumulator.
WAIT:
READ:
POLL:
READ 1:
END:
FIN:
MOV SCON,#00010001B;
MOV IE,#00010000B;
SETB 90H;
SETB 91H;
SETB 93H;
MOV R1,#003H;
MOV R0,#030H;
MOV R6,#004H;
NOP;
MOV A,P1;
ANL A,R6;
JZ READ;
SJMP WAIT;
CLR 90H;
CLR 98H;
JB 98H, READ1
SJMP POLL
MOV A,SBUF;
RLC A;
MOV B.0,C;
SETB 90H
SJMP FIN
RLC A; MOV B.1,C; RLC A; MOV B.2,C;
RLC A; MOV B.3,C; RLC A; MOV B.4,C;
RLC A; MOV B.5,C; RLC A; MOV B.6,C;
RLC A; MOV B.7,C;
MOV A,B;
MOV @R0,A;
INC R0;
DEC R1
MOV A,Rl
JZ END
JMP WAIT
Table VII. 8XC51 Code for Reading from the AD7711A
Configure 8051 for MODE 0
Operation
Disable All Interrupts
Set P1.0, Used as RFS
Set P1.1, Used as TFS
Set P1.3, Used as A0
Sets Number of Bytes to Be Read in
A Read Operation
Start Address for Where Bytes Will
Be Loaded
Use P1.2 as DRDY
Read Port 1
Mask Out All Bits Except DRDY
If Zero Read
Otherwise Keep Polling
Bring RFS Low
Clear Receive Flag
Tests Receive Interrupt Flag
Read Buffer
Rearrange Data
Reverse Order of Bits
Write Data to Memory
Increment Memory Location
Decrement Byte Counter
Jump if Zero
Fetch Next Byte
Bring RFS High
AD7711A
2

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