AD9148 Analog Devices, AD9148 Datasheet - Page 25

• Manufacturer Part Number: AD9148
• Manufacturer: Analog Devices

Specifications of AD9148

• Resolution (bits): 16bit
• Dac Update Rate: 1GSPS
• Dac Settling Time: n/a
• Max Pos Supply (v): +3.47V
• Single-supply: No
• Dac Type: Current Out
• Dac Input Format: LVDS,Par

Data Sheet
Addr
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x50
0x51
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Register
Name
Chip ID
Coeff I Byte 0
Coeff I Byte 1
Coeff I Byte 2
Coeff I Byte 3
Coeff Q Byte 0
Coeff Q Byte 1
Coeff Q Byte 2
Coeff Q Byte 3
I phase adj LSB
I phase adj
MSB
Q phase adj
LSB
Q phase adj
MSB
I DC offset LSB
I DC offset
MSB
Q DC offset
LSB
Q DC offset
MSB
IDAC FSC adj
IDAC control
AUX IDAC data
AUX IDAC
control
QDAC FSC adj
QDAC control
AUX QDAC
data
AUX QDAC
control
SED_S0_L
SED_S0_H
SED_S1_L
SED_S1_H
SED3_S2_L
SED3_S2_H
SED4_S3_L
SED4_S3_H
SED control/
status
SED_R_L
SED_R_H
SED_F_L
SED_F_H
I gain control
Q gain control
Bit 7
0
0
IDAC sleep
AUX IDAC
sign
AUX QDAC
sign
SED
compare
enable
0
0
QDAC sleep
Coeff_3q[2:0]
Coeff_4q[2:0]
Coeff_3i[2:0]
Coeff_4i[2:0]
Bit 6
AUX IDAC
current
direction
AUX QDAC
current
direction
Port B
error
detected
down
AUX QDAC
power-
down
Port A
error
detected
Bit 5
AUX IDAC
power-
Coeff_1q[3:0]
SED Status Falling Edge Samples[15:8]
Coeff_1i[3:0]
SED Status Rising Edge Samples[15:8]
SED Status Falling Edge Samples[7:0]
SED Compare Pattern Sample0[15:8]
SED Compare Pattern Sample1[15:8]
SED Compare Pattern Sample2[15:8]
SED Compare Pattern Sample3[15:8]
SED Status Rising Edge Samples[7:0]
SED Compare Pattern Sample0[7:0]
SED Compare Pattern Sample1[7:0]
SED Compare Pattern Sample2[7:0]
SED Compare Pattern Sample3[7:0]
Rev. B | Page 25 of 72
Bit 4
0
0
AUX QDAC Data[7:0]
AUX IDAC Data[7:0]
Phase Word Q[7:0]
QDAC FSC Adj[7:0]
Phase Word I[7:0]
IDAC FSC Adj[7:0]
DC Offset Q[15:8]
DC Offset I[15:8]
DC Offset Q[7:0]
DC Offset I[7:0]
Chip ID[7:0]
Q Gain[7:0]
I Gain[7:0]
Coeff_4q[9:3]
Coeff_4i[9:3]
Bit 3
Auto-
clear
enable
Coeff_2q[4:0]
Coeff_2i[4:0]
Port B
compare
failed
Bit 2
Coeff_3q[6:3]
Coeff_3i[6:3]
Coeff_0q[2:0]
Bit 1
Coeff_0i[2:0]
Phase Word I[9:8]
Phase Word Q[9:8]
Port A
compare
failed
AUX QDAC Data[9:8]
AUX IDAC Data[9:8]
QDAC FSC Adj[9:8]
IDAC FSC Adj[9:8]
Bit 0
Compare
passed
AD9148
0x00
0x00
0x00
0x00
0x7A
0x00
Default
0x07
0x00
0xC0
0xEF
0x7F
0x69
0xE6
0x0D
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xF9
0x01
0x00
0xF9
0x01
0x00
0xB6
0x45
0xEA
0x16
0x1A
0xC6
0xAA
0x40
0x40