AD8011 Analog Devices, AD8011 Datasheet - Page 11

• Manufacturer Part Number: AD8011
• Description: 300 MHz, 1 mA Current Feedback Amplifier
• Manufacturer: Analog Devices

Specifications of AD8011

• -3db Bandwidth: 400MHz
• Slew Rate: 3.5kV/µs
• Vos: 2mV
• Ib: 5µA
• # Opamps Per Pkg: 1
• Input Noise (nv/rthz): 2nV/rtHz
• Vcc-vee: 3V to 12V
• Isy Per Amplifier: 1.3mA
• Packages: DIP,SOIC

Note that the ac open-loop plots in Figures 8, 9, and 10 are based
on the full SPICE AD8011 simulations and do not include
external parasitics (see equations below). Nevertheless, these ac
loop equations still provide a good approximation to simulated
and actual performance up to the CLBW of the amplifier. Typi-
cally, g
pole. In the time domain (inverse Laplace of A
unstable, causing V
When the loop is closed however, the BW is greatly extended and
the transimpedance gain, T
the amplifiers stability behavior due to Z
for s>>1/τ1 (see Figure 10). This can be seen by the Z
A
REV. C
V
(s) noninverting transfer equations below.
140
120
100
1E+03
A s
80
60
40
20
0
mc
V
Figure 9. Open-Loop Transimpedance Gain
( ) =
Z s
R1 is –4, resulting in A
I
1E+04
( )



1
+
=
T
O
A
O
( –
G
1
(s)
O
to exponentially rail out of its linear region.
1E+05
+
g
FREQUENCY (Hz)
mc
R
T
O
F
O
2
×
1E+06
(s), overrides and directly controls



×
R




g
1
S
mf
)
τ
GAIN




1
1
O
G

 

(
(s) having a right half plane
1E+07
–
2
S
g
τ
g
S
mc
1 1
mf
I
G
τ
+
approaching 1/2 g
1
×
T
1E+08
)
PHASE
R
O
O
1
+
), it appears as
+
R
T
1
1E+09




O
F

  +

I
–40
–80
–120
–160
–200
–240
–280
0
(s) and
1




mf
–11–
Z
(g
complex term being 1/2 g
resistances of Q3/Q4. Using the computed CLBW from A
and the nominal design values for the other parameters, results in
a closed-loop 3 dB BW equal to the open-loop corner frequency
(1/2 πτ1) × 1/[G/(2 g
3 dB BW is controlled by the R
G/(2 g
parameters and R
1.2 MΩ), the computed BW is 80 MHz for G = 0 (inverting
I-V mode with R
DRIVING CAPACITIVE LOADS
The AD8011 was designed primarily to drive nonreactive loads.
If driving loads with a capacitive component is desired, the best
settling response is obtained by the addition of a small series
resistance as shown in Figure 11. The accompanying graph shows
the optimum value for R
noting that the frequency response of the circuit when driving
large capacitive loads will be dominated by the passive roll-off
of R
I
mc
(s) goes positive real and approaches 1/2 g
SERIES
Figure 10. Open-Loop Inverting Input Impedance
400
370
340
310
280
250
220
190
160
130
100
R1 – 1)/τ1. This results in the input resistance for the A
1E+03
mf
IMPEDANCE
and C
1k
T
O
Figure 11. Driving Capacitive Load
) for high gains. For example, using nominal design
1E+04
L
N
.
1
removed) and 40 MHz for G = +10/–9.
= 1 kΩ (which results in a nominal T
mf
1E+05
SERIES
AD8011
FREQUENCY (Hz)
1k
mf
T
O
, the parallel thermal emitter
1E+06
) + R
versus capacitive load. It is worth
F
/T
SERIES 1
SERIES 2
F
/T
O
PHASE
1E+07
R
term for low gains and
O
SERIES
]. For a fixed R
1k
Z
R
I
(s)
L
1E+08
mf
as
AD8011
C
1E+09
L
approaches
–20
–40
–60
–80
–100
–120
–140
–160
–180
20
0
F
, the
V
O
V
(s)
(s)
of