AD8011 Analog Devices, AD8011 Datasheet - Page 12

• Manufacturer Part Number: AD8011
• Description: 300 MHz, 1 mA Current Feedback Amplifier
• Manufacturer: Analog Devices

Specifications of AD8011

• -3db Bandwidth: 400MHz
• Slew Rate: 3.5kV/µs
• Vos: 2mV
• Ib: 5µA
• # Opamps Per Pkg: 1
• Input Noise (nv/rthz): 2nV/rtHz
• Vcc-vee: 3V to 12V
• Isy Per Amplifier: 1.3mA
• Packages: DIP,SOIC

AD8011
OPTIMIZING FLATNESS
As mentioned, the previous ac transfer equations are based on a
simplified single-pole model. Due to the device’s internal para-
sitics (primarily C
package/board parasites (partially represented in Figure 12) the
computed BW, using the previous V
be lower than the AD8011’s measured small signal BW. See
data sheet Bode plots.
With only internal parasitics included, the BW is extended due
to the complex pole pairs created primarily by C
C
results in a design controlled, closed-loop damping factor ( ) of
nominally 0.6 resulting in the CLBW increasing by approxi-
mately 1.3
for optimized external gains of +2/–1. As external noninverting
gain (G) is increased, the actual closed-loop bandwidth versus
the computed single-pole ac response is in closer agreement.
Inverting pin and external component capacitance (designated C
will further extend the CLBW due to the closed-loop zero created
by C
proper R
Considerations section), this capacitance should be about 1.5 pF.
This results in a further incremental BW increase of almost 2
(versus the computed value) for G = +1 decreasing and approach-
ing its complex pole pair BW for gains approaching +6 or higher.
As previously discussed, the single-pole response begins to corre-
late well. Note that a pole is also created by 1/2 g
prevents the AD8011 from becoming unstable. This parasitic
has the greatest effect on BW and peaking for low positive gains
as the data sheet Bode plots clearly show. For inverting operation,
C
P
P
2 versus the single-pole assumption shown above. This
has relatively much less effect on CLBW variation.
P
Figure 12. Recommended R
Load for ≤ 30 ns Settling to 0.1%
and R
40
30
20
10
F
component and layout techniques (see the Layout
0
N
higher than the computed single-pole value above
R
F
when operating in the noninverting mode. Using
P
1/C
5
P
1B and C
10
C
L
P
(pF)
2 in Figure 6) and external
O
SERIES
15
(s) equation, typically will
vs. Capacitive
20
mf
P
1/C
and C
P
2B and
25
P
, which
P
)
–12–
Output pin and external component capacitance (designated C
will further extend the devices BW and can also cause peaking
below and above the CLBW if too high. In the time domain,
poor step settling characteristics (ringing up to about 2 GHz
and excessive overshoot) can result. For high C
than about 5 pF, an external series damping resistor is recom-
mended. For light loads, any output capacitance will reflect on
A2’s output (Z2 of buffer A3) as both added capacitance near
the CLBW (CLBW > f
much higher frequencies. These added effects are proportional
to the load C. This reflected capacitance and negative resistance
has the effect of both reducing A2’s phase margin and causing
high frequency, L
series resistor (as previously specified) reduces these unwanted
effects by creating a reflected zero to A2’s output, which will
reduce the peaking and eliminate ringing. For heavy resistive
loads, relatively more load C would be required to cause these
same effects.
High inductive parasitics, especially on the supplies and inverting/
noninverting inputs, can cause modulated low level R
the output in the transient domain. Proper R
board layout practices need to be observed. Relatively high para-
sitic lead inductance (roughly L >15 nh) can result in L
underdamped ringing. Here L/C means all associated input pins,
external components, and lead frame strays, including collector
to substrate device capacitance. In the ac domain, this L
resonance effect would typically not appear in the pass band of
the amplifier but would appear in the open-loop response at
frequencies well above the CLBW of the amplifier.
11
10
9
8
7
6
5
4
3
2
1
1
V
G = +2
V
S
IN
Figure 13. Flatness vs. Feedback
=
= 200mV
5V
C, peaking respectively. Using an external
T
/B) and eventually negative resistance at
10
FREQUENCY (MHz)
R
R
F
F
= 750
= 1k
100
F
component and
L
values greater
F
ringing on
500
REV. C
C
C
L
)