ADM1060 Analog Devices, ADM1060 Datasheet - Page 49

• Manufacturer Part Number: ADM1060
• Description: Multi Power Supply Sequencer & Supervisor
• Manufacturer: Analog Devices

Specifications of ADM1060

• # Supplies Monitored: 7
• Volt Monitoring Accuracy: 2.5%
• # Output Drivers: 9
• Fet Drive/enable Output: Both
• Package: 28 ld TSSOP

PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Table 58. Pin Function Descriptions
Pin
1
2
3
4
5
6
7
8
9–12
13–14
15–23
24
25–28
Mnemonic
A0
A1
SDA
SCL
VDDCAP
GND
VCCP
VH
VP1–4
VB1–2
PDO1–9
WDI
GPI4–1
Function
Logic Input. Controls the seventh bit (LSB) of the 7-bit Serial Bus Address.
Logic Input. Controls the sixth bit of the 7-bit Serial Bus Address.
Serial Bus Data I/O Pin. Open-Drain output. Requires 2.2 kΩ pull-up resistor.
Open-Drain Serial Bus Clock Pin. Requires 2.2 kΩ pull-up resistor.
V
recommended for this function.
Ground. Connect to common of power supplies.
Reservoir Capacitor for Central Charge Pump. This provides the first stage in the tripler circuits used to
produce 12 V of gate drive on PDOs 1 to 4. A 1 µF capacitor is recommended for this function.
High Voltage Supply Input. Two input ranges. A supply of between 2 V and 6 V or between 4.8 V and 14.4 V
can be applied to this pin. The V
supply supervised.
Positive Only Supply Inputs. Three input ranges. A supply of between 0.6 V and 1.8 V, 1 V and 3 V, or 2 V and
6 V can be applied to this pin. The V
the highest supply supervised.
Bipolar Supply Inputs. Two modes. Two input ranges in positive mode. One input range in negative mode. A
supply of between –6 V and –2 V can be applied to this pin when set in negative mode. A supply of between
1 V and 3 V or between 2 V and 6 V can be applied to this pin when set in positive mode.
Programmable Driver Output Pin. All nine can be programmed as logic outputs with multiple pull-up options
to V
N-channel FETs.
Watchdog Input. Used to monitor a processor clock and asserts a fault condition if the clock fails to transition
from low-to-high or high-to-low within a programmed timeout period (up to 18 sec).
General-Purpose Logic Input. TTL compatible logic. Can be used as, for example, a manual reset, a chip en-
able pin, or an input for a control logic signal that may be used to initiate the power-up/power-down
sequence of the supplies under control.
DD
Bypass Capacitor Pin. A capacitor from this pin to GND stabilizes the V
DD
or VPn. PDOs 1 to 4 can also provide a charge-pump generated gate drive for external
VDDCAP
VCCP
GND
SDA
SCL
VB2
VP2
VP3
VP4
VP1
VB1
Figure 38. Pin Configuration
VH
A0
A1
Rev. B | Page 49 of 52
DD
10
11
12
13
14
1
2
3
4
5
6
7
8
9
arbitrator will select this supply to power the ADM1060 if it is the highest
(Not to Scale)
DD
ADM1060
TOP VIEW
arbitrator will select one of these supplies to power the ADM1060 if it is
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GPI2
GPI3
GPI4
WDI
GPI1
PDO9
PDO8
PDO7
PDO6
PDO5
PDO4
PDO3
PDO2
PDO1
DD
Arbitrator. A 1 µF capacitor is
ADM1060