ADAV4622 Analog Devices, ADAV4622 Datasheet - Page 9

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ADAV4622

Manufacturer Part Number
ADAV4622
Description
Audio Processor for Advanced TV with Sound IF Demodulator and Stereo Decoder
Manufacturer
Analog Devices
Datasheet

Specifications of ADAV4622

Instructions/cycles
2560
Dac Dnr (db)
94dB
Dac Thd+n
86dB
Product Description
Audio Processor for Advanced TV with Sound IF Demodulator and Stereo Decoder

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TIMING SPECIFICATIONS
Table 2.
Parameter
MASTER CLOCK AND RESET
MASTER CLOCK OUTPUT
I
SERIAL PORTS
2
C PORT
f
t
t
t
t
t
t
f
t
t
Start Condition
Stop Condition
Slave Mode
Master Mode
MCLKI
SCL
MCH
MCL
RESET
JIT
CH
CL
SCLH
SCLL
t
t
t
t
t
t
t
t
t
t
f
t
t
t
t
t
t
t
t
t
SBF
SCS
SCH
DS
SCR
SCF
SDR
SDF
SCS
SBH
SBL
SLS
SLH
SDS
SDH
SDD
MLD
MDD
MDS
MDH
Description
MCLKI frequency
MCLKI high
MCLKI low
RESET low
Period jitter
MCLK_OUT high
MCLK_OUT low
SCL clock frequency
SCL high
SCL low
Setup time
Hold time
Data setup time
SCL rise time
SCL fall time
SDA rise time
SDA fall time
Setup time
BCLK high
BCLK low
BCLK frequency
LRCLK setup
LRCLK hold
SDIN setup
SDIN hold
SDO delay
LRCLK delay
SDO delay
SDIN setup
SDIN hold
Min
3.072
10
10
200
45
45
600
1.3
600
600
100
0
40
40
64 × f
10
10
10
10
10
10
Rev. B | Page 9 of 28
S
Max
800
55
55
400
300
300
50
25
24.576
300
300
15
Unit
MHz
ns
ns
ns
ps
%
%
kHz
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Comments
Relevant for repeated start condition
After this period, the first clock is generated
To BCLK rising edge
From BCLK rising edge
To BCLK rising edge
From BCLK rising edge
From BCLK falling edge
From BCLK falling edge
From BCLK falling edge
From BCLK rising edge
From BCLK rising edge
ADAV4622

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