TDA7333013TR STMicroelectronics, TDA7333013TR Datasheet
TDA7333013TR
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TDA7333013TR Summary of contents
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... Table 1. Device summary Operating temp. range, °C (1) Order code E-TDA7333 E-TDA7333013TR 1. Devices in ECOPACK® package (see June 2008 Description The TDA7333 circuit is a RDS/RDBS signal processor, intended for recovering the inaudible RDS/RBDS informations which are transmitted on most FM radio broadcasting stations. ...
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Contents Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Block ...
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TDA7333 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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TDA7333 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram REF1 MPX 16 Cmpx SCL_CLK 11 SDA_DATAIN 12 SA_DATAOUT 13 CSN 14 1.2 Pin description Figure 2. Pin connection (top view) Cxti Cref Cref Cref 16pF ...
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Block diagram and pin description Table 2. Pin description Pin # Pin name 1 VDDA 2 REF3 3 REF2 4 REF1 5 VSS VDDD 8 RESETN 9 XTI 10 XTO 11 SCL_CLK 12 SDA_DATAIN 13 SA_DATAOUT Slave ...
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TDA7333 2 Electrical specifications 2.1 Quick reference Table 3. Quick Reference ( °C, VDDA/VDDD = 3 amb Symbol V /V Analog/digital power supply DDA DDD T Operating temperature amb f Quartz frequency osc I Total supply ...
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Electrical specifications 2.4 Electrical characteristics Table 6. Electrical characteristics T = -40 to +85 °C, V amb V and V must not differ more than 0.15 V DDD DDA Symbol Parameter Supply (pin 1,5,7) V Digital supply voltage DDD V ...
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TDA7333 Table 6. Electrical characteristics (continued -40 to +85 °C, V amb V and V must not differ more than 0.15 V DDD DDA Symbol Parameter Sigma delta modulator F Sample rate s OVR Oversampling ratio Relative total ...
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Functional description 3 Functional description 3.1 Overview The new RDS/RBDS processor contains all RDS/RBDS relevant functions on a single chip. It recovers the inaudible RDS/RBDS information which are transmitted on most FM radio broadcasting stations. Due to an integrated 3 ...
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TDA7333 and its frequency response is: with Figure 3. Transfer function 100 0 Figure 4. Magnitude response of sinc. 4/16 filter in RDS band 0 0.5 1 ...
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Functional description 3.4 RDS bandpass filter and interpolator th The 8 order digital RDS bandpass filter is of type Tschebyscheff and centered at 57 kHz. With linear phase characteristics in the passband and approximately flat group delay it guarantees best ...
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TDA7333 3.5 Demodulator The demodulator includes: ● RDS quality indicator with selectable sensitivity ● Selectable time constant of 57 kHz PLL ● Selectable time constant of bit PLL ● time constant selection done automatically or by software Figure 7. Demodulator ...
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Functional description bits marked as bad by the quality bit are allowed to be corrected in the group and block synchronization module. Thus the error correction is directly influenced by this setup. The time constant of the 57 kHz PLL ...
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TDA7333 This module is used to acquire group and block synchronization of the received RDS data stream, which is provided in a modified shortened cyclic code. For the theory and implementation of the modified shortened cyclic code, please refer to ...
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Functional description 3.7.1 rds_int register Figure 9. rds_int register rds_int bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset value 0 0 bit name write bne ar_res synch itsrc2 itsrc1 itsrc0 int ...
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TDA7333 3.7.3 rds_corrp register Figure 11. rds_corrp register rds_comp bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 reset value 0 bit name cp9 cp8 cp7 cp6 cp5 access r 3.7.4 rds_bd_h register ...
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Functional description 3.7.5 rds_bd_l register Figure 13. rds_bd_l register rds_bd_I bit 7 bit 6 0 reset value bit name m7 m6 access r 3.7.6 rds_bd_ctrl register rds_bd_ctrl register Figure 14. rds_bd_ctrl bit 7 bit 6 bit 5 bit 4 bit ...
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TDA7333 2 3 transfer mode This interface consists of three lines: a serial data line (SDA), a bit clock (SCL), and a slave address select (SA). The interface is capable of operating in fast mode (up to 400kbits/s) ...
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Functional description 3.8.2 Read transfer 2 Figure 18 read transfer S S lave addre ss from master to slave from slave to master Eight bytes can be read at a time (please refer to The master has always ...
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TDA7333 3.9 SPI mode Figure 21. SPI data transfer CSN CLK DATAIN DATAOUT update of shiftregister with registers content This interface consists of four lines. A serial data input (DATAIN), a serial data output (DATAOUT), a chip select input (CSN) ...
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Functional description Figure 23. Read out RDS data and related flags, no update of rds_int and rds_bd_ctrl registers CSN CLK DATAIN DATAOUT Figure 24. Write rds_int registers in SPI mode, reading 1 register CSN CLK DATAIN DATAOUT The content of ...
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TDA7333 4 Application notes A typical rds data transfer could work like this: 1. The micro sets the interrupt source to “RDS block” interrupt by setting itsrc[2:0] to 001. 2. The micro continuously checks the rds_int[7:0] bits for the first ...
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Package information 5 Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages. ECOPACK® packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, ...
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TDA7333 6 Revision history Table 9. Document revision history Date 25-Jun-2008 Revision 1 Initial release. Revision history Changes 25/26 ...
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