TDA7333013TR STMicroelectronics, TDA7333013TR Datasheet - Page 14

• Manufacturer Part Number: TDA7333013TR
• Description: IC PROCESSOR RDS/RBDS 16-TSSOP
• Manufacturer: STMicroelectronics
• Type: RDS/RBDS Signal Processorr

Specifications of TDA7333013TR

• Applications: Radio
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Functional description
3.6
14/26
bits marked as bad by the quality bit are allowed to be corrected in the group and block
synchronization module. Thus the error correction is directly influenced by this setup.
The time constant of the 57 kHz PLL and the 1187.5 Hz PLL may be influenced by software
(see
This is useful in order to achieve a fast synchronization after a program resp. frequency
change (fast time constant) and to get a maximum of noise immunity after synchronization
(slow time constant).
The user may choose between 2 possibilities via bit rds_bd_ctrl[1] (see
1.
2.
Group and block synchronization module
The group and block synchronization module has the following features:
●
●
●
●
●
●
Figure 8.
Hardware selected time constant - In this case both pll time constants are reset to the
fastest one with a reset from the group and block synchronization module. If the
software decides to re synchronize, it generates a reset. Both PLL are set to the fastest
time constant, which is automatically increased to the slowest one. This is done in four
steps within a total time of 215.6 ms (256 RDS clocks).
Software selected time constant - In this case the time constant of both PLL can be
selected individually by software.PLL time constants can be set independently.
Hardware group and block synchronization
Hardware error detection
Hardware error correction using the quality bit information of the demodulator
Hardware synchronization flywheel
TA information extraction
reset by software (ar_res)
Chapter
BLOCK D
BLOCK A
BLOCK B
AR_RES
TAEON
RDSCLK
RDSDAT
RDSQAL
TA
Demodulator
from RDS
Group and block synchronization block diagram
3.7.6).
read only
Correction
logic
rds_bd_h,rds_bd_l
RDSDAT(15:0)
Syndrome register
Quality bit counter
RDS block counter
S(9:0)
Correct. pat.
Group & Block Synchronization Control Block
S(4:0)
Corrected
Data_OK
Syndrom zero
ABH
DBH
BLOCKE detected
read only
CP(9:5)
rds_corrp
Block
missed
read only
Q(3:0)
QU(0:3)
rds_qu
bit_int
read/write
set
Chapter
next
RDS
bit
rds_int
res
new
Block
available
set
3.7.6):
int
TDA7333