LPC1776FBD208 NXP Semiconductors, LPC1776FBD208 Datasheet - Page 84

• Manufacturer Part Number: LPC1776FBD208
• Description: The LPC1776 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 18.
C
Values guaranteed by design.
[1]
[2]
[3]
Table 19.
C
Values guaranteed by design.
[1]
LPC178X_7X
Objective data sheet
Symbol
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
Symbol
Common to read and write cycles
T
t
t
t
t
t
t
t
t
t
t
Read cycle parameters
t
t
Write cycle parameters
t
t
h(CAS)
d(WV)
h(W)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
d(SV)
h(S)
d(RASV)
h(RAS)
d(CASV)
h(CAS)
d(WV)
h(W)
d(AV)
h(A)
su(D)
h(D)
d(QV)
h(Q)
L
L
cy(clk)
= 30 pF, T
= 30 pF, T
Refers to SDRAM clock signal EMC_CLKx.
The data input set-up time has to be selected with the following margin:
t
The data input hold time has to be selected with the following margin:
t
Refers to SDRAM clock signal EMC_CLKx.
su(D)
h(D)
+ SDRAM access time  board delay time  delay time of feedback clock  0.
+ delay time of feedback clock  SDRAM access time  board delay time  0.
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 00
Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits) = 01
amb
amb
Parameter
column address strobe hold time
write valid delay time
write hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
Parameter
clock cycle time
chip select valid delay time
chip select hold time
row address strobe valid delay time
row address strobe hold time
column address strobe valid delay time
column address strobe hold time
write valid delay time
write hold time
address valid delay time
address hold time
data input set-up time
data input hold time
data output valid delay time
data output hold time
=
=


40
40


C to 85
C to 85


C, V
C, V
DD(REG)(3V3)
DD(REG)(3V3)
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 27 December 2011
= 3.0 V to 3.6 V. All programmable delays EMCDLYCTL are bypassed.
= 3.0 V to 3.6 V. All programmable delays EMCDLYCTL are bypassed.
Conditions
Conditions
[2]
[3]
[1]
[2]
[3]
32-bit ARM Cortex-M3 microcontroller
Min
1.3
3.6
1.6
3.4
1.1
5.3
3.7
3.9
0.2
Min
12.5
2.7
1.0
2.7
1.1
2.7
1.2
3.2
1.6
3.3
1.0
5.3
3.7
3.3
0.2
Typ
1.9
5.2
5.0
3.8
4.3
5.8
0.6
Typ
-
4.1
1.8
4.8
4.9
3.8
4.3
4.9
0.5
2.4
1.7
4.1
1.6
4.1
1.7
2.3
1.6
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
7.7
7.4
8.7
6.1
7.1
7.3
7.3
Max
3.5
4.2
3.0
1.5
5.2
1.6
Max
-
6.0
3.1
6.0
3.3
3.3
4.2
2.8
1.5
5.2
1.6
…continued
84 of 120
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns