LPC1776 NXP [NXP Semiconductors], LPC1776 Datasheet
LPC1776
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LPC1776 Summary of contents
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LPC178x/7x 32-bit ARM Cortex-M3 microcontroller 512 kB flash and 96 kB SRAM; USB Device/Host/OTG; Ethernet; LCD; EMC Rev. 2 — 27 May 2011 1. General description The LPC178x/ ARM Cortex-M3 based microcontroller for embedded applications requiring ...
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NXP Semiconductors Cortex-M3 system tick timer, including an external clock input option. Standard JTAG test/debug interface as well as Serial Wire Debug and Serial WireTrace Port options. Emulation trace module supports real-time trace. Boundary scan for ...
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NXP Semiconductors CAN controller with two channels. Digital peripherals: SD/MMC memory card interface. 165 General Purpose I/O (GPIO) pins depending on the packaging, with configurable pull-up/down resistors, open-drain mode, and repeater mode. All GPIOs ...
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NXP Semiconductors Clock generation: Clock output function that can reflect the main oscillator clock, IRC clock, RTC clock, CPU clock, USB clock, or the watchdog timer clock. On-chip crystal oscillator with an operating range of 1 MHz ...
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... LPC1776 plastic low profile quad flat package; 208 leads; body 28 28 1.4 mm LPC1776FBD208 LQFP208 thin fine-pitch ball grid array package; 180 balls; body 12 12 0.8 mm LPC1776FET180 TFBGA180 LPC1774 plastic low profile quad flat package; 208 leads; body 28 28 1.4 mm LPC1774FBD208 LQFP208 plastic low profile quad flat package ...
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... LPC1785FBD208 256 64 LPC177x LPC1778FBD208/ 512 64 LPC1778FET208 LPC1778FET180 512 64 LPC1778FBD144 512 64 LPC1777FBD208 512 64 LPC1776FBD208 256 64 LPC1776FET180 256 64 LPC1774FBD208 128 32 LPC1774FBD144 128 32 [1] Maximum data bus width of the External Memory Controller (EMC) depends on package size. Smaller widths may be used. [2] USART4 not available. LPC178X_7X ...
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NXP Semiconductors 5. Block diagram debug JTAG port interface TEST/DEBUG INTERFACE CORTEX-M3 I-code bus slave EMC slave (1) LCD slave HIGH-SPEED GPIO APB slave group 0 UART0/1 I CAN 0/1 TIMER 0/1 WINDOWED WDT PWM0/1 12-bit ADC PIN CONNECT GPIO ...
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NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration (LQFP208) Fig 3. Pin configuration (TFBGA208) LPC178X_7X Objective data sheet 1 LPC178x/7xFBD208 52 ball A1 index area ...
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NXP Semiconductors Fig 4. Pin configuration (TFBGA180) Fig 5. Pin configuration (LQFP144) 6.2 Pin description I/O pins on the LPC178x/7x are 5V tolerant and have input hysteresis unless otherwise indicated in the table below. Crystal pins, power pins, and reference ...
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NXP Semiconductors Table 3. Pin description Not all functions are available on all parts. See pins). Symbol P0[0] to P0[31] P0[0] 94 U15 M10 66 P0[1] 96 T14 N11 67 P0[2] 202 C4 D5 141 P0[3] 204 D6 A3 142 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[5] 166 C12 B11 115 P0[6] 164 D13 D11 113 P0[7] 162 C13 B12 112 LPC178X_7X Objective data sheet Table 2 (Ethernet, ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[8] 160 A15 C12 111 P0[9] 158 C14 A13 109 P0[10] 98 T15 L10 69 LPC178X_7X Objective data sheet Table 2 (Ethernet, ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[11] 100 R14 P12 70 P0[12 P0[13 P0[14 P0[15] 128 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[18] 124 K15 J13 86 P0[19] 122 L17 J10 85 P0[20] 120 M17 K14 83 P0[21] 118 M16 K11 82 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[22] 116 N17 L14 80 P0[23 P0[24 P0[25 P0[26] 12 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P0[28 P0[29 P0[30 P0[31 P1[0] to ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[4] 192 A5 C6 133 P1[5] 156 A17 B13 - P1[6] 171 B11 B10 - P1[7] 153 D14 C13 - P1[8] 190 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[11] 163 A14 A12 - P1[12] 157 A16 A14 - P1[13] 147 D16 D14 - P1[14] 184 A7 D8 128 P1[15] 182 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[19 P1[20 P1[21 P1[22 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[23 P1[24 P1[25] 80 T10 L7 56 P1[26] 82 R10 P8 57 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[27] 88 T12 M9 61 P1[28] 90 T13 P10 63 P1[29] 92 U14 N10 64 P1[30 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P1[31 P2[0] to P2[31] P2[0] 154 B17 D12 107 P2[1] 152 E14 C14 106 P2[2] 150 D15 E11 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P2[3] 144 E16 E13 100 P2[4] 142 D17 E14 99 P2[5] 140 F16 F12 97 P2[6] 138 E17 F13 96 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P2[7] 136 G16 G11 95 P2[8] 134 H15 G14 93 P2[9] 132 H16 H11 92 P2[10] 110 N15 M13 76 LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P2[11] 108 T17 M12 75 P2[12] 106 N14 N14 73 P2[13] 102 T16 M11 71 P2[14] 91 R12 - - LPC178X_7X Objective ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P2[15] 99 P13 - - P2[16] 87 R11 P9 - P2[17] 95 R13 P11 - P2[18 P2[19] 67 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P2[27 P2[28 P2[29 P2[30 P2[31] 39 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P3[ P3[ P3[8] 191 P3[9] 199 P3[10] 205 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P3[19] 161 B14 - - P3[20] 167 A13 - - P3[21] 175 C10 - - P3[22] 195 P3[23] 65 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P3[27] 203 P3[28 P3[29 P3[30 P3[31] 25 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P4[6] 113 M14 K10 78 P4[7] 121 L16 K12 84 P4[8]/ 127 J17 J11 88 P4[9] 131 H17 H12 91 P4[10] 135 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P4[21] 115 M15 - - P4[22] 123 K14 - - P4[23] 129 J15 - - P4[24] 183 B8 C8 127 P4[25] 179 ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P4[29] 176 B10 B9 122 P4[30] 187 B7 C7 130 P4[31] 193 A4 E7 134 P5[0] to P5[4] P5[ ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol P5[3] 141 G14 G10 98 P5[4] 206 C3 C4 143 JTAG_TDO (SWO) JTAG_TDI JTAG_TMS ...
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NXP Semiconductors Table 3. Pin description …continued Not all functions are available on all parts. See pins). Symbol V 26, H4, G1, 18, DD(REG)(3V3) 86, P11, N9, 60, 174 D11 E9 121 DDA V 15, ...
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NXP Semiconductors [ Input Output Ground Supply. [ tolerant pad providing digital I/O functions with TTL levels and hysteresis. [4] <tbd> [ tolerant pad providing digital I/O functions ...
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NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol 9 P1[ P0[ P2[4] Row E 1 P0[26 ...
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NXP Semiconductors Table 4. Pin allocation table TFBGA208 Not all functions are available on all parts. See Ball Symbol Ball Symbol P0[19] Row M 1 P3[15 ...
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NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol Row A 5 P1[ P1[ P0[9] 14 Row B 1 JTAG_TDO_SWO 2 5 P1[0] 6 ...
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NXP Semiconductors Table 5. Pin allocation table TFBGA180 Not all functions are available on all parts. See Ball Symbol Ball Symbol Row J 1 RESET 2 5 P0[13 P0[18] 14 Row K 1 VBAT 2 ...
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NXP Semiconductors The LPC178x/7x use a multi-layer AHB matrix to connect the ARM Cortex-M3 buses and other bus masters to peripherals in a flexible manner that optimizes performance by allowing peripherals that are on different slaves ports of the matrix ...
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NXP Semiconductors The MPU separates the memory into distinct regions and implements protection by preventing disallowed accesses. The MPU supports up to eight regions each of which can be divided into eight subregions. Accesses to memory locations that are not ...
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APB1 peripherals 0x4010 0000 31 system control 0x400F C000 reserved (1) 16 SD/MMC 0x400C 0000 (1) 15 QEI 0x400B C000 14 motor control PWM 0x400B 8000 reserved 13 0x400B ...
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NXP Semiconductors 7.8 Nested Vectored Interrupt Controller (NVIC) The NVIC is an integral part of the Cortex-M3. The tight coupling to the CPU allows for low interrupt latency and efficient processing of late arriving interrupts. 7.8.1 Features • Controls system ...
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... LPC1788FET180 EMC_D[15:0] LPC1788FBD144 EMC_D[7:0] LPC1787FBD208 EMC_D[31:0] LPC1786FBD208 EMC_D[31:0] LPC1785FBD208 EMC_D[31:0] LPC1778FBD208 EMC_D[31:0] LPC1778FET208 EMC_D[31:0] LPC1778FET180 EMC_D[15:0] LPC1778FBD144 EMC_D[7:0] LPC1777FBD208 EMC_D[31:0] LPC1776FBD208 EMC_D[31:0] LPC1776FET180 EMC_D[15:0] LPC1774FBD208 EMC_D[31:0] LPC1774FBD144 EMC_D[7:0] LPC178X_7X Objective data sheet Control pins pins SRAM EMC_A[25:0] EMC_BLS[3:0], EMC_CS[3:0], EMC_OE, EMC_WE ...
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NXP Semiconductors The LPC178x/7x EMC is an ARM PrimeCell MultiPort Memory Controller peripheral offering support for asynchronous static memory devices such as RAM, ROM, and flash. In addition, it can be used as an interface with off-chip memory-mapped devices and ...
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NXP Semiconductors 7.11.1 Features • Eight DMA channels. Each channel can support an unidirectional transfer. • 16 DMA request lines. • Single DMA and burst DMA request signals. Each peripheral connected to the DMA Controller can assert either a burst ...
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NXP Semiconductors • Accept any size of data width per write 32-bit. – 8-bit write: 1-cycle operation – 16-bit write: 2-cycle operation (8-bit x 2-cycle) – 32-bit write: 4-cycle operation (8-bit x 4-cycle) 7.13 LCD controller Remark: ...
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NXP Semiconductors 7.14 Ethernet Remark: The Ethernet block is available on parts LPC1788/86 and LPC1778/76. The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware ...
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NXP Semiconductors – Attachment of external PHY chip through standard MII or RMII interface. – PHY register access is available via the MIIM interface. 7.15 USB interface Remark: The USB Device/Host/OTG controller is available on parts LPC1788/87/86/85 and LPC1778/77/76. The ...
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NXP Semiconductors • Supports per-port power switching 7.15.3 USB OTG controller USB OTG is a supplement to the USB 2.0 Specification that augments the capability of existing mobile devices and USB peripherals by adding host functionality for connection to USB ...
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NXP Semiconductors • GPIO registers are accessed through the AHB multilayer bus so that the fastest possible I/O timing can be achieved. • Mask registers allow treating sets of port bits as a group, leaving other bits unchanged. • All ...
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NXP Semiconductors 7.19.1 Features • 10-bit DAC • Resistor string architecture • Buffered output • Power-down mode • Selectable output drive • Dedicated conversion timer • DMA support 7.20 UARTs Remark: USART4 is not available on part LPC1774FBD144. The LPC178x/7x ...
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NXP Semiconductors during a given data transfer. The SSP supports full duplex transfers, with frames of 4 bits to 16 bits of data flowing from the master to the slave and from the slave to the master. In practice, often ...
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NXP Semiconductors 2 7.23 I S-bus serial I/O controllers The LPC178x/7x contain one I communication interface for digital audio applications. 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word ...
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NXP Semiconductors • Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN buses. • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard Identifiers. • FullCAN messages can generate interrupts. 7.25 General purpose 32-bit timers/external event ...
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NXP Semiconductors Two match registers can be used to provide a single edge controlled PWM output. One match register (PWMMR0) controls the PWM cycle rate, by resetting the count upon match. The other match register controls the PWM edge position. ...
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NXP Semiconductors PWM to immediately release all motor drive outputs. At the same time, the motor control PWM is highly configurable for other generalized timing, counting, capture, and compare applications. The maximum PWM speed is determined by the PWM resolution ...
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NXP Semiconductors 7.30 Windowed WatchDog Timer (WWDT) The purpose of the watchdog is to reset the controller if software fails to periodically service it within a programmable time window. 7.30.1 Features • Internally resets chip if not periodically reloaded during ...
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NXP Semiconductors • Dedicated power supply pin can be connected to a battery or to the main 3.3 V. • Periodic interrupts can be generated from increments of any field of the time registers. • Backup registers (20 bytes) powered ...
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NXP Semiconductors IRC oscillator main oscillator Fig 7. LPC178x/7x clock generation block diagram 7.33.1.1 Internal RC oscillator The IRC may be used as the clock that drives the PLL and subsequently the CPU. The nominal IRC frequency is 12 MHz. ...
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NXP Semiconductors 7.33.1.3 RTC oscillator The RTC oscillator provides clock to the RTC and a 32 kHz clock output that can be output on the CLKOUT pin in order to allow trimming the RTC oscillator without interference ...
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NXP Semiconductors 7.33.3 Wake-up timer The LPC178x/7x begin operation at power-up and when awakened from Power-down mode by using the 12 MHz IRC oscillator as the clock source. This allows chip operation to resume quickly. If the main oscillator or ...
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NXP Semiconductors The DMA controller can continue to work in Sleep mode, and has access to the peripheral RAMs and all peripheral registers. The flash memory and the main SRAM are not available in Sleep mode, they are disabled in ...
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NXP Semiconductors 7.33.4.4 Deep power-down mode The Deep power-down mode can only be entered from the RTC block. In Deep power-down mode, power is shut off to the entire chip with the exception of the RTC module and the RESET ...
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NXP Semiconductors The second option uses two power supplies; a 3.3 V supply for the I/O pads (V a dedicated 3.3 V supply for the CPU (V powered independently from the I/O pad ring enables shutting down of the I/O ...
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NXP Semiconductors Section 7.33.3), causing reset to remain asserted until the external Reset is de-asserted, the oscillator is running, a fixed number of clocks have passed, and the flash controller has completed its initialization. When the internal Reset is removed, ...
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NXP Semiconductors 7.34.4 APB interface The APB peripherals are split into two separate APB buses in order to distribute the bus bandwidth and thereby reducing stalls caused by contention between the CPU and the GPDMA controller. 7.34.5 AHB multilayer matrix ...
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NXP Semiconductors 8. Limiting values Table 9. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V regulator supply voltage (3.3 V) DD(REG)(3V3) V analog 3.3 V pad supply ...
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NXP Semiconductors 9. Thermal characteristics 9.1 Thermal characteristics The average chip junction temperature, T equation amb • ambient temperature (C), amb • R th(j-a) • sum of internal and I/O power dissipation ...
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NXP Semiconductors 10. Static characteristics Table 11. Static characteristics +85 C, unless otherwise specified. amb Symbol Parameter Supply pins V supply voltage (3.3 V) DD(3V3) V regulator supply voltage DD(REG)(3V3) (3.3 V) ...
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NXP Semiconductors Table 11. Static characteristics …continued +85 C, unless otherwise specified. amb Symbol Parameter I ADC supply current DD(ADC) I ADC input current I(ADC) Standard port pins, RESET I LOW-level input ...
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NXP Semiconductors Table 11. Static characteristics …continued +85 C, unless otherwise specified. amb Symbol Parameter V hysteresis voltage hys V LOW-level output OL voltage I input leakage current LI USB pins I ...
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NXP Semiconductors [9] All internal pull-ups disabled. All pins configured as output and driven LOW C. [10 3 DDA amb = 25 C. [11 3 i(VREFP) amb [12] Including ...
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NXP Semiconductors X (X) Conditions: V Fig 10. Power-down mode: Regulator supply current I X (X) Conditions: V Fig 11. Deep power-down mode: Battery supply current I LPC178X_7X Objective data sheet <tbd> ...
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NXP Semiconductors 10.2 Peripheral power consumption The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled in the PCONP register. All other blocks are disabled and no ...
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NXP Semiconductors Table 12. amb Peripheral EMC RTC USB + PLL1 Ethernet LPC178X_7X Objective data sheet Power consumption for individual analog and digital blocks <tbd> V. PCLK = CCLK/4. DD(REG)(3V3) Conditions PCENET bit ...
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NXP Semiconductors 10.3 Electrical pin characteristics 3 (V) 3.2 2.8 2.4 Conditions: V Fig 12. Typical HIGH-level output voltage (mA) 10 Conditions: V Fig 13. Typical LOW-level output current I LPC178X_7X Objective data ...
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NXP Semiconductors I (μA) Conditions: V Fig 14. Typical pull-up current (μ −10 Conditions: V Fig 15. Typical pull-down current I LPC178X_7X Objective data sheet +10 pu −10 − ...
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NXP Semiconductors 11. Dynamic characteristics 11.1 Flash memory Table 13. amb Symbol N endu t ret prog [1] Number of program/erase cycles. [2] Programming times are given for writing 256 bytes from RAM ...
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NXP Semiconductors 11.2 External memory interface Table 15. Dynamic characteristics: Static external memory interface pF amb [1] Symbol Parameter T clock cycle time cy(clk) [2] ...
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NXP Semiconductors Table 15. Dynamic characteristics: Static external memory interface pF amb [1] Symbol Parameter t BLS LOW to BLS HIGH time WR BLSLBLSH t ...
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NXP Semiconductors BLSx WE D Fig 17. External static memory read/write access (PB = BLSx Fig 18. External static memory burst read cycle Table 16. Dynamic characteristics: ...
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NXP Semiconductors Table 16. Dynamic characteristics: Dynamic external memory interface, read strategy bits (RD bits pF amb Values guaranteed by design. Symbol Parameter ...
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NXP Semiconductors [1] The data input set-up time has to be selected with the following margin: + delay time of feedback clock sdram access time board delay time su(D) [2] The data input hold time ...
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NXP Semiconductors 11.3 External clock Table 19. amb Symbol f osc T cy(clk) t CHCX t CLCX t CLCH t CHCL [1] Parameters are valid over operating temperature range unless otherwise specified. Typical ratings are not ...
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NXP Semiconductors X (X) Conditions: Frequency values are typical values. 12 MHz accuracy is guaranteed for 2.7 V fall outside the 12 MHz accuracy specification for voltages below 2.7 V. Fig ...
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NXP Semiconductors Table 22. amb Symbol T cy(clk v(Q) t h(Q) = (SSPCLKDIV SCR) CPSDVSR [1] T cy(clk function of the main ...
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NXP Semiconductors SCK (CPOL = 0) SCK (CPOL = 1) Fig 23. SSP slave timing in SPI mode 2 11.7 I C-bus Table 23. amb Symbol f SCL LOW t HIGH LPC178X_7X Objective ...
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NXP Semiconductors Table 23. amb Symbol t HD;DAT t SU;DAT [1] See the I [2] Parameters are valid over operating temperature range unless otherwise specified. [ the data hold time that is measured from ...
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NXP Semiconductors 2 11.8 I S-bus interface Table 24. amb Symbol common to input and output output t v(Q) input t su(D) t h(D) [1] CCLK = 100 ...
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NXP Semiconductors I2S_RX_SCK I2S_RX_SDA I2S_RX_WS Fig 26. I 11.9 USB Table 25. Dynamic characteristics of USB pins (full-speed) pF 1 Symbol Parameter t rise time r t ...
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NXP Semiconductors t PERIOD crossover point differential data lines differential data to n × t Fig 27. Differential data-to-EOP transition skew and EOP width 11.10 Ethernet Remark: The Ethernet block is available on parts LPC1788/86 and LPC1778/76. Table 26. ...
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NXP Semiconductors Fig 28. Ethernet timing 11.11 LCD Remark: The LCD controller is available on parts LPC1788/87/86/85. Table 27. Values listed describe design constraints. Symbol T cy(clk) X (X) Fig 29. LCD timing 11.12 SD/MMC Remark: The SD/MMC card interface ...
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NXP Semiconductors Table 28. amb Symbol f clk t su(D) t h(D) t d(QV) t h(Q) Fig 30. SD/MMC timing 12. ADC electrical characteristics Table DDA Symbol ...
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NXP Semiconductors Table DDA Symbol f c(ADC) 8-bit resolution L(adj clk(ADC) f c(ADC) [1] Conditions: V [2] The ADC is monotonic, ...
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NXP Semiconductors 4095 4094 4093 4092 4091 4090 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity ...
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NXP Semiconductors The values of resistor components R process-dependent. Fig 32. ADC interface to pins ADC0_IN[n] Table 30. Component 13. DAC electrical characteristics Table ...
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NXP Semiconductors 14. Application information 14.1 Suggested USB interface solutions Remark: The USB controller is available as a device/Host/OTG controller on parts LPC1788/87/86/85 and LPC1778/77/76 and as device-only controller on parts LPC1774. LPC17xx Fig 33. USB interface on a self-powered ...
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NXP Semiconductors RSTOUT LPC17xx USB_SCL USB_SDA EINTn USB_D+ USB_D− USB_UP_LED Fig 35. USB OTG port configuration USB_UP_LED USB_D+ USB_D− LPC17xx USB_PWRD USB_OVRCR USB_PPWR Fig 36. USB host port configuration LPC178X_7X Objective data sheet V DD RESET_N ADR/PSW OE_N/INT_N V DD ...
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NXP Semiconductors USB_UP_LED USB_CONNECT LPC17xx USB_D+ USB_D− V BUS Fig 37. USB device port configuration 14.2 Crystal oscillator XTAL input and component selection The input voltage to the on-chip oscillators is limited to 1 the oscillator is driven ...
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NXP Semiconductors Fig 39. Oscillator modes and models: oscillation mode of operation and external crystal model used for C Table 32. Fundamental oscillation frequency F 1 MHz - 5 MHz 5 MHz - 10 MHz 10 MHz - 15 MHz ...
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NXP Semiconductors order to keep the noise coupled in via the PCB as small as possible. Also parasitics should stay as small as possible. Values of C accordingly to the increase in parasitics of the PCB layout. 14.4 Standard I/O ...
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NXP Semiconductors 14.5 Reset pin configuration reset Fig 41. Reset pin configuration LPC178X_7X Objective data sheet GLITCH FILTER All information provided in this document is subject to legal disclaimers. Rev. 2 — 27 May ...
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NXP Semiconductors 15. Package outline LQFP208; plastic low profile quad flat package; 208 leads; body 1 156 157 pin 1 index 208 DIMENSIONS (mm are the original ...
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NXP Semiconductors TFBGA208: plastic thin fine-pitch ball grid array package; 208 balls; body 0.7 mm ball A1 index area ...
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NXP Semiconductors TFBGA180: thin fine-pitch ball grid array package; 180 balls; body 0.8 mm ball A1 index area ball A1 index ...
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NXP Semiconductors LQFP144: plastic low profile quad flat package; 144 leads; body 1 108 109 pin 1 index 144 DIMENSIONS (mm are the original dimensions) A UNIT ...
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NXP Semiconductors 16. Soldering Footprint information for reflow soldering of LQFP208 package solder land occupied area DIMENSIONS 0.500 0.560 31.300 31.300 28.300 28.300 Fig 46. Reflow soldering of the LQFP208 ...
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NXP Semiconductors Footprint information for reflow soldering of TFBGA180 package P Hy solder land solder paste deposit solder land plus solder paste occupied area solder resist DIMENSIONS 0.80 0.400 0.400 0.550 12.575 12.575 ...
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NXP Semiconductors Footprint information for reflow soldering of LQFP144 package solder land occupied area DIMENSIONS 0.500 0.560 23.300 23.300 20.300 20.300 Fig 48. Reflow soldering of the LQFP144 package LPC178X_7X ...
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NXP Semiconductors 17. Abbreviations Table 34. Acronym ADC AHB AMBA APB BOD CAN DAC DCC DMA DSP EOP ETM GPIO GPS HVAC IRC IrDA JTAG MAC MIIM OHCI OTG PHY PLC PLL PWM RIT RMII SE0 SPI SSI SSP TCM ...
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NXP Semiconductors 18. Revision history Table 35. Revision history Document ID Release date LPC178X_7X v.2 20110527 • Modifications: Symbol names in • Reserved functions added in • Added function LCD_VD[5] to pin P0[10]. • Added function LCD_VD[10] to pin P0[11]. ...
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NXP Semiconductors 19. Legal information 19.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use neither qualified nor tested in accordance with automotive testing ...
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NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . ...
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NXP Semiconductors 7.35 Emulation and debugging . . . . . . . . . . . . . . . . 68 8 Limiting values ...