LPC1820FET100 NXP Semiconductors, LPC1820FET100 Datasheet - Page 24
LPC1820FET100
Manufacturer Part Number
LPC1820FET100
Description
The LPC1820FET100 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 168 kB of SRAM, and advanced peripherals including High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1810FBD144.pdf
(157 pages)
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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P4_5
P4_6
P4_7
Pin description
D2
C1
H4
x
x
x
…continued
-
-
-
15
17
21
All information provided in this document is subject to legal disclaimers.
10
11
14
Rev. 3.1 — 15 December 2011
-
-
-
[3]
[3]
[3]
I; PU I/O GPIO2[5] — General purpose digital input/output pin.
I; PU I/O GPIO2[6] — General purpose digital input/output pin.
O;
PU
O
O
-
-
-
-
-
O
O
-
-
-
-
-
O
I
-
-
-
-
I/O I2S1_TX_SCK — Transmit Clock. It is driven by the
I/O I2S0_TX_SCK — Transmit Clock. It is driven by the
Description
CTOUT_5 — SCT output 5. Match output 1 of
timer 1.
LCD_FP — Frame pulse (STN). Vertical
synchronization pulse (TFT).
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
CTOUT_4 — SCT output 4. Match output 0 of timer
1.
LCD_ENAB/LCDM — STN AC bias drive or TFT
data enable input.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
LCD_DCLK — LCD panel clock.
GP_CLKIN — General purpose clock input to the
CGU.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
master and received by the slave. Corresponds to
the signal SCK in the I
master and received by the slave. Corresponds to
the signal SCK in the I
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
2
S-bus specification.
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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